1*a47a12beSStefan Roese /* 2*a47a12beSStefan Roese * Machine dependent access functions for RTC registers. 3*a47a12beSStefan Roese */ 4*a47a12beSStefan Roese #ifndef __ASM_PPC_MC146818RTC_H 5*a47a12beSStefan Roese #define __ASM_PPC_MC146818RTC_H 6*a47a12beSStefan Roese 7*a47a12beSStefan Roese #include <asm/io.h> 8*a47a12beSStefan Roese 9*a47a12beSStefan Roese #ifndef RTC_PORT 10*a47a12beSStefan Roese #define RTC_PORT(x) (0x70 + (x)) 11*a47a12beSStefan Roese #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ 12*a47a12beSStefan Roese #endif 13*a47a12beSStefan Roese 14*a47a12beSStefan Roese /* 15*a47a12beSStefan Roese * The yet supported machines all access the RTC index register via 16*a47a12beSStefan Roese * an ISA port access but the way to access the date register differs ... 17*a47a12beSStefan Roese */ 18*a47a12beSStefan Roese #define CMOS_READ(addr) ({ \ 19*a47a12beSStefan Roese outb_p((addr),RTC_PORT(0)); \ 20*a47a12beSStefan Roese inb_p(RTC_PORT(1)); \ 21*a47a12beSStefan Roese }) 22*a47a12beSStefan Roese #define CMOS_WRITE(val, addr) ({ \ 23*a47a12beSStefan Roese outb_p((addr),RTC_PORT(0)); \ 24*a47a12beSStefan Roese outb_p((val),RTC_PORT(1)); \ 25*a47a12beSStefan Roese }) 26*a47a12beSStefan Roese 27*a47a12beSStefan Roese #endif /* __ASM_PPC_MC146818RTC_H */ 28