1a47a12beSStefan Roese /* 291a76751SWolfgang Denk * (C) Copyright 2002-2010 3a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4a47a12beSStefan Roese * 5a47a12beSStefan Roese * See file CREDITS for list of people who contributed to this 6a47a12beSStefan Roese * project. 7a47a12beSStefan Roese * 8a47a12beSStefan Roese * This program is free software; you can redistribute it and/or 9a47a12beSStefan Roese * modify it under the terms of the GNU General Public License as 10a47a12beSStefan Roese * published by the Free Software Foundation; either version 2 of 11a47a12beSStefan Roese * the License, or (at your option) any later version. 12a47a12beSStefan Roese * 13a47a12beSStefan Roese * This program is distributed in the hope that it will be useful, 14a47a12beSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 15a47a12beSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16a47a12beSStefan Roese * GNU General Public License for more details. 17a47a12beSStefan Roese * 18a47a12beSStefan Roese * You should have received a copy of the GNU General Public License 19a47a12beSStefan Roese * along with this program; if not, write to the Free Software 20a47a12beSStefan Roese * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21a47a12beSStefan Roese * MA 02111-1307 USA 22a47a12beSStefan Roese */ 23a47a12beSStefan Roese 24a47a12beSStefan Roese #ifndef __ASM_GBL_DATA_H 25a47a12beSStefan Roese #define __ASM_GBL_DATA_H 26a47a12beSStefan Roese 27a47a12beSStefan Roese #include "config.h" 28a47a12beSStefan Roese #include "asm/types.h" 29a47a12beSStefan Roese 30a47a12beSStefan Roese /* 31a47a12beSStefan Roese * The following data structure is placed in some memory wich is 32a47a12beSStefan Roese * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 33a47a12beSStefan Roese * some locked parts of the data cache) to allow for a minimum set of 34a47a12beSStefan Roese * global variables during system initialization (until we have set 35a47a12beSStefan Roese * up the memory controller so that we can use RAM). 36a47a12beSStefan Roese */ 37a47a12beSStefan Roese 38a47a12beSStefan Roese typedef struct global_data { 39a47a12beSStefan Roese bd_t *bd; 40a47a12beSStefan Roese unsigned long flags; 41*a7e5ee9eSSimon Glass unsigned int baudrate; 42a47a12beSStefan Roese unsigned long cpu_clk; /* CPU clock in Hz! */ 43a47a12beSStefan Roese unsigned long bus_clk; 44a47a12beSStefan Roese #if defined(CONFIG_8xx) 45a47a12beSStefan Roese unsigned long brg_clk; 46a47a12beSStefan Roese #endif 47a47a12beSStefan Roese #if defined(CONFIG_CPM2) 48a47a12beSStefan Roese /* There are many clocks on the MPC8260 - see page 9-5 */ 49a47a12beSStefan Roese unsigned long vco_out; 50a47a12beSStefan Roese unsigned long cpm_clk; 51a47a12beSStefan Roese unsigned long scc_clk; 52a47a12beSStefan Roese unsigned long brg_clk; 53a47a12beSStefan Roese #ifdef CONFIG_PCI 54a47a12beSStefan Roese unsigned long pci_clk; 55a47a12beSStefan Roese #endif 56a47a12beSStefan Roese #endif 57a47a12beSStefan Roese unsigned long mem_clk; 58a47a12beSStefan Roese #if defined(CONFIG_MPC83xx) 59a47a12beSStefan Roese /* There are other clocks in the MPC83XX */ 60a47a12beSStefan Roese u32 csb_clk; 617c619ddcSIlya Yanok #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 627c619ddcSIlya Yanok defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 63a47a12beSStefan Roese u32 tsec1_clk; 64a47a12beSStefan Roese u32 tsec2_clk; 65a47a12beSStefan Roese u32 usbdr_clk; 66a47a12beSStefan Roese #endif 67a47a12beSStefan Roese #if defined (CONFIG_MPC834x) 68a47a12beSStefan Roese u32 usbmph_clk; 69a47a12beSStefan Roese #endif /* CONFIG_MPC834x */ 70a47a12beSStefan Roese #if defined(CONFIG_MPC8315) 71a47a12beSStefan Roese u32 tdm_clk; 72a47a12beSStefan Roese #endif 73a47a12beSStefan Roese u32 core_clk; 74a47a12beSStefan Roese u32 enc_clk; 75a47a12beSStefan Roese u32 lbiu_clk; 76a47a12beSStefan Roese u32 lclk_clk; 77a47a12beSStefan Roese u32 pci_clk; 787c619ddcSIlya Yanok #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 797c619ddcSIlya Yanok defined(CONFIG_MPC837x) 80a47a12beSStefan Roese u32 pciexp1_clk; 81a47a12beSStefan Roese u32 pciexp2_clk; 82a47a12beSStefan Roese #endif 83a47a12beSStefan Roese #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 84a47a12beSStefan Roese u32 sata_clk; 85a47a12beSStefan Roese #endif 86a47a12beSStefan Roese #if defined(CONFIG_MPC8360) 87a47a12beSStefan Roese u32 mem_sec_clk; 88a47a12beSStefan Roese #endif /* CONFIG_MPC8360 */ 89a47a12beSStefan Roese #endif 90a47a12beSStefan Roese #if defined(CONFIG_FSL_ESDHC) 91a47a12beSStefan Roese u32 sdhc_clk; 92a47a12beSStefan Roese #endif 93a47a12beSStefan Roese #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 94a47a12beSStefan Roese u32 lbc_clk; 95a47a12beSStefan Roese void *cpu; 96a47a12beSStefan Roese #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 97a47a12beSStefan Roese #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 98a47a12beSStefan Roese u32 i2c1_clk; 99a47a12beSStefan Roese u32 i2c2_clk; 100a47a12beSStefan Roese #endif 101a47a12beSStefan Roese #if defined(CONFIG_QE) 102a47a12beSStefan Roese u32 qe_clk; 103a47a12beSStefan Roese u32 brg_clk; 104a47a12beSStefan Roese uint mp_alloc_base; 105a47a12beSStefan Roese uint mp_alloc_top; 106a47a12beSStefan Roese #endif /* CONFIG_QE */ 107a47a12beSStefan Roese #if defined(CONFIG_FSL_LAW) 108a47a12beSStefan Roese u32 used_laws; 109a47a12beSStefan Roese #endif 110a47a12beSStefan Roese #if defined(CONFIG_E500) 111a47a12beSStefan Roese u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 112a47a12beSStefan Roese #endif 113a47a12beSStefan Roese #if defined(CONFIG_MPC5xxx) 114a47a12beSStefan Roese unsigned long ipb_clk; 115a47a12beSStefan Roese unsigned long pci_clk; 116a47a12beSStefan Roese #endif 117a47a12beSStefan Roese #if defined(CONFIG_MPC512X) 118a47a12beSStefan Roese u32 ips_clk; 119a47a12beSStefan Roese u32 csb_clk; 120a47a12beSStefan Roese u32 pci_clk; 121a47a12beSStefan Roese #endif /* CONFIG_MPC512X */ 122a47a12beSStefan Roese #if defined(CONFIG_MPC8220) 123a47a12beSStefan Roese unsigned long bExtUart; 124a47a12beSStefan Roese unsigned long inp_clk; 125a47a12beSStefan Roese unsigned long pci_clk; 126a47a12beSStefan Roese unsigned long vco_clk; 127a47a12beSStefan Roese unsigned long pev_clk; 128a47a12beSStefan Roese unsigned long flb_clk; 129a47a12beSStefan Roese #endif 130a47a12beSStefan Roese phys_size_t ram_size; /* RAM size */ 131a47a12beSStefan Roese unsigned long reset_status; /* reset status register at boot */ 132a47a12beSStefan Roese #if defined(CONFIG_MPC83xx) 133a47a12beSStefan Roese unsigned long arbiter_event_attributes; 134a47a12beSStefan Roese unsigned long arbiter_event_address; 135a47a12beSStefan Roese #endif 136a47a12beSStefan Roese unsigned long env_addr; /* Address of Environment struct */ 137a47a12beSStefan Roese unsigned long env_valid; /* Checksum of Environment valid? */ 138a47a12beSStefan Roese unsigned long have_console; /* serial_init() was called */ 1399558b48aSGraeme Russ #ifdef CONFIG_PRE_CONSOLE_BUFFER 1409558b48aSGraeme Russ unsigned long precon_buf_idx; /* Pre-Console buffer index */ 1419558b48aSGraeme Russ #endif 142a47a12beSStefan Roese #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) 143a47a12beSStefan Roese unsigned int dp_alloc_base; 144a47a12beSStefan Roese unsigned int dp_alloc_top; 145a47a12beSStefan Roese #endif 146a47a12beSStefan Roese #if defined(CONFIG_4xx) 147a47a12beSStefan Roese u32 uart_clk; 148a47a12beSStefan Roese #endif /* CONFIG_4xx */ 149a47a12beSStefan Roese #if defined(CONFIG_SYS_GT_6426x) 150a47a12beSStefan Roese unsigned int mirror_hack[16]; 151a47a12beSStefan Roese #endif 152a47a12beSStefan Roese #if defined(CONFIG_A3000) || \ 153a47a12beSStefan Roese defined(CONFIG_HIDDEN_DRAGON) || \ 154a47a12beSStefan Roese defined(CONFIG_MUSENKI) || \ 155a47a12beSStefan Roese defined(CONFIG_SANDPOINT) 156a47a12beSStefan Roese void * console_addr; 157a47a12beSStefan Roese #endif 158a47a12beSStefan Roese unsigned long relocaddr; /* Start address of U-Boot in RAM */ 159a47a12beSStefan Roese #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) 160a47a12beSStefan Roese unsigned long fb_base; /* Base address of framebuffer memory */ 161a47a12beSStefan Roese #endif 162a47a12beSStefan Roese #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) 163a47a12beSStefan Roese unsigned long post_log_word; /* Record POST activities */ 16479843950SValentin Longchamp unsigned long post_log_res; /* success of POST test */ 165a47a12beSStefan Roese unsigned long post_init_f_time; /* When post_init_f started */ 166a47a12beSStefan Roese #endif 167a47a12beSStefan Roese #ifdef CONFIG_BOARD_TYPES 168a47a12beSStefan Roese unsigned long board_type; 169a47a12beSStefan Roese #endif 170a47a12beSStefan Roese #ifdef CONFIG_MODEM_SUPPORT 171a47a12beSStefan Roese unsigned long do_mdm_init; 172a47a12beSStefan Roese unsigned long be_quiet; 173a47a12beSStefan Roese #endif 174a47a12beSStefan Roese #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) 175a47a12beSStefan Roese unsigned long kbd_status; 176a47a12beSStefan Roese #endif 1772da0fc0dSDirk Eibach #ifdef CONFIG_SYS_FPGA_COUNT 1782da0fc0dSDirk Eibach unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 1792da0fc0dSDirk Eibach #endif 180a47a12beSStefan Roese #if defined(CONFIG_WD_MAX_RATE) 181a47a12beSStefan Roese unsigned long long wdt_last; /* trace watch-dog triggering rate */ 182a47a12beSStefan Roese #endif 183a47a12beSStefan Roese void **jt; /* jump table */ 18491a76751SWolfgang Denk char env_buf[32]; /* buffer for getenv() before reloc. */ 185a47a12beSStefan Roese } gd_t; 186a47a12beSStefan Roese 18747fde91fSMike Frysinger #include <asm-generic/global_data_flags.h> 188a47a12beSStefan Roese 189a47a12beSStefan Roese #if 1 190a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 191a47a12beSStefan Roese #else /* We could use plain global data, but the resulting code is bigger */ 192a47a12beSStefan Roese #define XTRN_DECLARE_GLOBAL_DATA_PTR extern 193a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 194a47a12beSStefan Roese gd_t *gd 195a47a12beSStefan Roese #endif 196a47a12beSStefan Roese 197a47a12beSStefan Roese #endif /* __ASM_GBL_DATA_H */ 198