xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/global_data.h (revision 43e60814b3ee690c02ebf86391b341aeaef9fb0e)
1a47a12beSStefan Roese /*
291a76751SWolfgang Denk  * (C) Copyright 2002-2010
3a47a12beSStefan Roese  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4a47a12beSStefan Roese  *
5a47a12beSStefan Roese  * See file CREDITS for list of people who contributed to this
6a47a12beSStefan Roese  * project.
7a47a12beSStefan Roese  *
8a47a12beSStefan Roese  * This program is free software; you can redistribute it and/or
9a47a12beSStefan Roese  * modify it under the terms of the GNU General Public License as
10a47a12beSStefan Roese  * published by the Free Software Foundation; either version 2 of
11a47a12beSStefan Roese  * the License, or (at your option) any later version.
12a47a12beSStefan Roese  *
13a47a12beSStefan Roese  * This program is distributed in the hope that it will be useful,
14a47a12beSStefan Roese  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15a47a12beSStefan Roese  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16a47a12beSStefan Roese  * GNU General Public License for more details.
17a47a12beSStefan Roese  *
18a47a12beSStefan Roese  * You should have received a copy of the GNU General Public License
19a47a12beSStefan Roese  * along with this program; if not, write to the Free Software
20a47a12beSStefan Roese  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21a47a12beSStefan Roese  * MA 02111-1307 USA
22a47a12beSStefan Roese  */
23a47a12beSStefan Roese 
24a47a12beSStefan Roese #ifndef	__ASM_GBL_DATA_H
25a47a12beSStefan Roese #define __ASM_GBL_DATA_H
26a47a12beSStefan Roese 
27a47a12beSStefan Roese #include "config.h"
28a47a12beSStefan Roese #include "asm/types.h"
29a47a12beSStefan Roese 
305cb48582SSimon Glass /* Architecture-specific global data */
315cb48582SSimon Glass struct arch_global_data {
321206c184SSimon Glass #if defined(CONFIG_8xx)
331206c184SSimon Glass 	unsigned long brg_clk;
341206c184SSimon Glass #endif
351206c184SSimon Glass #if defined(CONFIG_CPM2)
36748cd059SSimon Glass 	/* There are many clocks on the MPC8260 - see page 9-5 */
37748cd059SSimon Glass 	unsigned long vco_out;
38748cd059SSimon Glass 	unsigned long cpm_clk;
39748cd059SSimon Glass 	unsigned long scc_clk;
401206c184SSimon Glass 	unsigned long brg_clk;
411206c184SSimon Glass #endif
42c6731fe2SSimon Glass 	/* TODO: sjg@chromium.org: Should these be unslgned long? */
43a47a12beSStefan Roese #if defined(CONFIG_MPC83xx)
44a47a12beSStefan Roese 	/* There are other clocks in the MPC83XX */
45a47a12beSStefan Roese 	u32 csb_clk;
467c619ddcSIlya Yanok # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
477c619ddcSIlya Yanok 	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
48a47a12beSStefan Roese 	u32 tsec1_clk;
49a47a12beSStefan Roese 	u32 tsec2_clk;
50a47a12beSStefan Roese 	u32 usbdr_clk;
51a88731a6SGerlando Falauto # elif defined(CONFIG_MPC8309)
52a88731a6SGerlando Falauto 	u32 usbdr_clk;
53a47a12beSStefan Roese # endif
54a47a12beSStefan Roese # if defined(CONFIG_MPC834x)
55a47a12beSStefan Roese 	u32 usbmph_clk;
56a47a12beSStefan Roese # endif /* CONFIG_MPC834x */
57a47a12beSStefan Roese # if defined(CONFIG_MPC8315)
58a47a12beSStefan Roese 	u32 tdm_clk;
59a47a12beSStefan Roese # endif
60a47a12beSStefan Roese 	u32 core_clk;
61a47a12beSStefan Roese 	u32 enc_clk;
62a47a12beSStefan Roese 	u32 lbiu_clk;
63a47a12beSStefan Roese 	u32 lclk_clk;
647c619ddcSIlya Yanok # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
657c619ddcSIlya Yanok 	defined(CONFIG_MPC837x)
66a47a12beSStefan Roese 	u32 pciexp1_clk;
67a47a12beSStefan Roese 	u32 pciexp2_clk;
68a47a12beSStefan Roese # endif
69a47a12beSStefan Roese # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
70a47a12beSStefan Roese 	u32 sata_clk;
71a47a12beSStefan Roese # endif
72a47a12beSStefan Roese # if defined(CONFIG_MPC8360)
73a47a12beSStefan Roese 	u32 mem_sec_clk;
74a47a12beSStefan Roese # endif /* CONFIG_MPC8360 */
75a47a12beSStefan Roese #endif
7667ac13b1SSimon Glass #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
7767ac13b1SSimon Glass 	u32 lbc_clk;
7867ac13b1SSimon Glass 	void *cpu;
7967ac13b1SSimon Glass #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
80609e6ec3SSimon Glass #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
81609e6ec3SSimon Glass 		defined(CONFIG_MPC86xx)
82609e6ec3SSimon Glass 	u32 i2c1_clk;
83609e6ec3SSimon Glass 	u32 i2c2_clk;
84609e6ec3SSimon Glass #endif
8545bae2e3SSimon Glass #if defined(CONFIG_QE)
8645bae2e3SSimon Glass 	u32 qe_clk;
8745bae2e3SSimon Glass 	u32 brg_clk;
8845bae2e3SSimon Glass 	uint mp_alloc_base;
8945bae2e3SSimon Glass 	uint mp_alloc_top;
9045bae2e3SSimon Glass #endif /* CONFIG_QE */
918670dbc9SSimon Glass #if defined(CONFIG_FSL_LAW)
928670dbc9SSimon Glass 	u32 used_laws;
938670dbc9SSimon Glass #endif
947c80c6c5SSimon Glass #if defined(CONFIG_E500)
957c80c6c5SSimon Glass 	u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
967c80c6c5SSimon Glass #endif
97b2877496SSimon Glass #if defined(CONFIG_MPC5xxx)
98b2877496SSimon Glass 	unsigned long ipb_clk;
99b2877496SSimon Glass #endif
100fefb098bSSimon Glass #if defined(CONFIG_MPC512X)
101fefb098bSSimon Glass 	u32 ips_clk;
102fefb098bSSimon Glass 	u32 csb_clk;
103fefb098bSSimon Glass #endif /* CONFIG_MPC512X */
1041c356135SSimon Glass #if defined(CONFIG_MPC8220)
1051c356135SSimon Glass 	unsigned long inp_clk;
1061c356135SSimon Glass 	unsigned long vco_clk;
1071c356135SSimon Glass 	unsigned long pev_clk;
1081c356135SSimon Glass 	unsigned long flb_clk;
1091c356135SSimon Glass #endif
1103c4c308cSSimon Glass 	unsigned long reset_status;	/* reset status register at boot */
111*43e60814SSimon Glass #if defined(CONFIG_MPC83xx)
112*43e60814SSimon Glass 	unsigned long arbiter_event_attributes;
113*43e60814SSimon Glass 	unsigned long arbiter_event_address;
114*43e60814SSimon Glass #endif
115c6731fe2SSimon Glass };
116c6731fe2SSimon Glass 
117c6731fe2SSimon Glass /*
118c6731fe2SSimon Glass  * The following data structure is placed in some memory wich is
119c6731fe2SSimon Glass  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
120c6731fe2SSimon Glass  * some locked parts of the data cache) to allow for a minimum set of
121c6731fe2SSimon Glass  * global variables during system initialization (until we have set
122c6731fe2SSimon Glass  * up the memory controller so that we can use RAM).
123c6731fe2SSimon Glass  */
124c6731fe2SSimon Glass 
125c6731fe2SSimon Glass typedef	struct	global_data {
126c6731fe2SSimon Glass 	bd_t		*bd;
127c6731fe2SSimon Glass 	unsigned long	flags;
128c6731fe2SSimon Glass 	unsigned int	baudrate;
129c6731fe2SSimon Glass 	unsigned long	cpu_clk;	/* CPU clock in Hz! */
130c6731fe2SSimon Glass 	unsigned long	bus_clk;
131c6731fe2SSimon Glass 	/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
132c6731fe2SSimon Glass 	unsigned long pci_clk;
133c6731fe2SSimon Glass 	unsigned long   mem_clk;
134a47a12beSStefan Roese #if defined(CONFIG_FSL_ESDHC)
135a47a12beSStefan Roese 	u32 sdhc_clk;
136a47a12beSStefan Roese #endif
137a47a12beSStefan Roese 	phys_size_t	ram_size;	/* RAM size */
138a47a12beSStefan Roese 	unsigned long	env_addr;	/* Address  of Environment struct	*/
139a47a12beSStefan Roese 	unsigned long	env_valid;	/* Checksum of Environment valid?	*/
140a47a12beSStefan Roese 	unsigned long	have_console;	/* serial_init() was called		*/
1419558b48aSGraeme Russ #ifdef CONFIG_PRE_CONSOLE_BUFFER
1429558b48aSGraeme Russ 	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */
1439558b48aSGraeme Russ #endif
144a47a12beSStefan Roese #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
145a47a12beSStefan Roese 	unsigned int	dp_alloc_base;
146a47a12beSStefan Roese 	unsigned int	dp_alloc_top;
147a47a12beSStefan Roese #endif
148a47a12beSStefan Roese #if defined(CONFIG_4xx)
149a47a12beSStefan Roese 	u32  uart_clk;
150a47a12beSStefan Roese #endif /* CONFIG_4xx */
151a47a12beSStefan Roese #if defined(CONFIG_SYS_GT_6426x)
152a47a12beSStefan Roese 	unsigned int	mirror_hack[16];
153a47a12beSStefan Roese #endif
154a47a12beSStefan Roese #if defined(CONFIG_A3000)	|| \
155a47a12beSStefan Roese     defined(CONFIG_HIDDEN_DRAGON)  || \
156a47a12beSStefan Roese     defined(CONFIG_MUSENKI)	||  \
157a47a12beSStefan Roese     defined(CONFIG_SANDPOINT)
158a47a12beSStefan Roese 	void *		console_addr;
159a47a12beSStefan Roese #endif
160a47a12beSStefan Roese 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
161a47a12beSStefan Roese #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
162a47a12beSStefan Roese 	unsigned long	fb_base;	/* Base address of framebuffer memory	*/
163a47a12beSStefan Roese #endif
164a47a12beSStefan Roese #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
165a47a12beSStefan Roese 	unsigned long	post_log_word;  /* Record POST activities */
16679843950SValentin Longchamp 	unsigned long	post_log_res; /* success of POST test */
167a47a12beSStefan Roese 	unsigned long	post_init_f_time;  /* When post_init_f started */
168a47a12beSStefan Roese #endif
169a47a12beSStefan Roese #ifdef CONFIG_BOARD_TYPES
170a47a12beSStefan Roese 	unsigned long	board_type;
171a47a12beSStefan Roese #endif
172a47a12beSStefan Roese #ifdef CONFIG_MODEM_SUPPORT
173a47a12beSStefan Roese 	unsigned long do_mdm_init;
174a47a12beSStefan Roese 	unsigned long be_quiet;
175a47a12beSStefan Roese #endif
176a47a12beSStefan Roese #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
177a47a12beSStefan Roese 	unsigned long kbd_status;
178a47a12beSStefan Roese #endif
1792da0fc0dSDirk Eibach #ifdef CONFIG_SYS_FPGA_COUNT
1802da0fc0dSDirk Eibach 	unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
1812da0fc0dSDirk Eibach #endif
182a47a12beSStefan Roese #if defined(CONFIG_WD_MAX_RATE)
183a47a12beSStefan Roese 	unsigned long long wdt_last;	/* trace watch-dog triggering rate */
184a47a12beSStefan Roese #endif
185a47a12beSStefan Roese 	void		**jt;		/* jump table */
18691a76751SWolfgang Denk 	char		env_buf[32];	/* buffer for getenv() before reloc. */
1875cb48582SSimon Glass 	struct arch_global_data arch;	/* architecture-specific data */
188a47a12beSStefan Roese } gd_t;
189a47a12beSStefan Roese 
19047fde91fSMike Frysinger #include <asm-generic/global_data_flags.h>
191a47a12beSStefan Roese 
192a47a12beSStefan Roese #if 1
193a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r2")
194a47a12beSStefan Roese #else /* We could use plain global data, but the resulting code is bigger */
195a47a12beSStefan Roese #define XTRN_DECLARE_GLOBAL_DATA_PTR	extern
196a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR     XTRN_DECLARE_GLOBAL_DATA_PTR \
197a47a12beSStefan Roese 				    gd_t *gd
198a47a12beSStefan Roese #endif
199a47a12beSStefan Roese 
200a47a12beSStefan Roese #endif /* __ASM_GBL_DATA_H */
201