xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/global_data.h (revision 1206c18403ff25814673a4dbfa071ae06bbefaef)
1a47a12beSStefan Roese /*
291a76751SWolfgang Denk  * (C) Copyright 2002-2010
3a47a12beSStefan Roese  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4a47a12beSStefan Roese  *
5a47a12beSStefan Roese  * See file CREDITS for list of people who contributed to this
6a47a12beSStefan Roese  * project.
7a47a12beSStefan Roese  *
8a47a12beSStefan Roese  * This program is free software; you can redistribute it and/or
9a47a12beSStefan Roese  * modify it under the terms of the GNU General Public License as
10a47a12beSStefan Roese  * published by the Free Software Foundation; either version 2 of
11a47a12beSStefan Roese  * the License, or (at your option) any later version.
12a47a12beSStefan Roese  *
13a47a12beSStefan Roese  * This program is distributed in the hope that it will be useful,
14a47a12beSStefan Roese  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15a47a12beSStefan Roese  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16a47a12beSStefan Roese  * GNU General Public License for more details.
17a47a12beSStefan Roese  *
18a47a12beSStefan Roese  * You should have received a copy of the GNU General Public License
19a47a12beSStefan Roese  * along with this program; if not, write to the Free Software
20a47a12beSStefan Roese  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21a47a12beSStefan Roese  * MA 02111-1307 USA
22a47a12beSStefan Roese  */
23a47a12beSStefan Roese 
24a47a12beSStefan Roese #ifndef	__ASM_GBL_DATA_H
25a47a12beSStefan Roese #define __ASM_GBL_DATA_H
26a47a12beSStefan Roese 
27a47a12beSStefan Roese #include "config.h"
28a47a12beSStefan Roese #include "asm/types.h"
29a47a12beSStefan Roese 
305cb48582SSimon Glass /* Architecture-specific global data */
315cb48582SSimon Glass struct arch_global_data {
32*1206c184SSimon Glass #if defined(CONFIG_8xx)
33*1206c184SSimon Glass 	unsigned long brg_clk;
34*1206c184SSimon Glass #endif
35*1206c184SSimon Glass #if defined(CONFIG_CPM2)
36*1206c184SSimon Glass 	unsigned long brg_clk;
37*1206c184SSimon Glass #endif
38*1206c184SSimon Glass #if defined(CONFIG_QE)
39*1206c184SSimon Glass 	u32 brg_clk;
40*1206c184SSimon Glass #endif
415cb48582SSimon Glass };
425cb48582SSimon Glass 
43a47a12beSStefan Roese /*
44a47a12beSStefan Roese  * The following data structure is placed in some memory wich is
45a47a12beSStefan Roese  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
46a47a12beSStefan Roese  * some locked parts of the data cache) to allow for a minimum set of
47a47a12beSStefan Roese  * global variables during system initialization (until we have set
48a47a12beSStefan Roese  * up the memory controller so that we can use RAM).
49a47a12beSStefan Roese  */
50a47a12beSStefan Roese 
51a47a12beSStefan Roese typedef	struct	global_data {
52a47a12beSStefan Roese 	bd_t		*bd;
53a47a12beSStefan Roese 	unsigned long	flags;
54a7e5ee9eSSimon Glass 	unsigned int	baudrate;
55a47a12beSStefan Roese 	unsigned long	cpu_clk;	/* CPU clock in Hz! */
56a47a12beSStefan Roese 	unsigned long	bus_clk;
57a47a12beSStefan Roese #if defined(CONFIG_CPM2)
58a47a12beSStefan Roese 	/* There are many clocks on the MPC8260 - see page 9-5 */
59a47a12beSStefan Roese 	unsigned long	vco_out;
60a47a12beSStefan Roese 	unsigned long	cpm_clk;
61a47a12beSStefan Roese 	unsigned long	scc_clk;
62a47a12beSStefan Roese #ifdef CONFIG_PCI
63a47a12beSStefan Roese 	unsigned long	pci_clk;
64a47a12beSStefan Roese #endif
65a47a12beSStefan Roese #endif
66a47a12beSStefan Roese 	unsigned long   mem_clk;
67a47a12beSStefan Roese #if defined(CONFIG_MPC83xx)
68a47a12beSStefan Roese 	/* There are other clocks in the MPC83XX */
69a47a12beSStefan Roese 	u32 csb_clk;
707c619ddcSIlya Yanok #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
717c619ddcSIlya Yanok 	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
72a47a12beSStefan Roese 	u32 tsec1_clk;
73a47a12beSStefan Roese 	u32 tsec2_clk;
74a47a12beSStefan Roese 	u32 usbdr_clk;
75a88731a6SGerlando Falauto #elif defined(CONFIG_MPC8309)
76a88731a6SGerlando Falauto 	u32 usbdr_clk;
77a47a12beSStefan Roese #endif
78a47a12beSStefan Roese #if defined (CONFIG_MPC834x)
79a47a12beSStefan Roese 	u32 usbmph_clk;
80a47a12beSStefan Roese #endif /* CONFIG_MPC834x */
81a47a12beSStefan Roese #if defined(CONFIG_MPC8315)
82a47a12beSStefan Roese 	u32 tdm_clk;
83a47a12beSStefan Roese #endif
84a47a12beSStefan Roese 	u32 core_clk;
85a47a12beSStefan Roese 	u32 enc_clk;
86a47a12beSStefan Roese 	u32 lbiu_clk;
87a47a12beSStefan Roese 	u32 lclk_clk;
88a47a12beSStefan Roese 	u32 pci_clk;
897c619ddcSIlya Yanok #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
907c619ddcSIlya Yanok 	defined(CONFIG_MPC837x)
91a47a12beSStefan Roese 	u32 pciexp1_clk;
92a47a12beSStefan Roese 	u32 pciexp2_clk;
93a47a12beSStefan Roese #endif
94a47a12beSStefan Roese #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
95a47a12beSStefan Roese 	u32 sata_clk;
96a47a12beSStefan Roese #endif
97a47a12beSStefan Roese #if defined(CONFIG_MPC8360)
98a47a12beSStefan Roese 	u32  mem_sec_clk;
99a47a12beSStefan Roese #endif /* CONFIG_MPC8360 */
100a47a12beSStefan Roese #endif
101a47a12beSStefan Roese #if defined(CONFIG_FSL_ESDHC)
102a47a12beSStefan Roese 	u32 sdhc_clk;
103a47a12beSStefan Roese #endif
104a47a12beSStefan Roese #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
105a47a12beSStefan Roese 	u32 lbc_clk;
106a47a12beSStefan Roese 	void *cpu;
107a47a12beSStefan Roese #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
108a47a12beSStefan Roese #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
109a47a12beSStefan Roese 	u32 i2c1_clk;
110a47a12beSStefan Roese 	u32 i2c2_clk;
111a47a12beSStefan Roese #endif
112a47a12beSStefan Roese #if defined(CONFIG_QE)
113a47a12beSStefan Roese 	u32 qe_clk;
114a47a12beSStefan Roese 	uint mp_alloc_base;
115a47a12beSStefan Roese 	uint mp_alloc_top;
116a47a12beSStefan Roese #endif /* CONFIG_QE */
117a47a12beSStefan Roese #if defined(CONFIG_FSL_LAW)
118a47a12beSStefan Roese 	u32 used_laws;
119a47a12beSStefan Roese #endif
120a47a12beSStefan Roese #if defined(CONFIG_E500)
121a47a12beSStefan Roese 	u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
122a47a12beSStefan Roese #endif
123a47a12beSStefan Roese #if defined(CONFIG_MPC5xxx)
124a47a12beSStefan Roese 	unsigned long	ipb_clk;
125a47a12beSStefan Roese 	unsigned long	pci_clk;
126a47a12beSStefan Roese #endif
127a47a12beSStefan Roese #if defined(CONFIG_MPC512X)
128a47a12beSStefan Roese 	u32 ips_clk;
129a47a12beSStefan Roese 	u32 csb_clk;
130a47a12beSStefan Roese 	u32 pci_clk;
131a47a12beSStefan Roese #endif /* CONFIG_MPC512X */
132a47a12beSStefan Roese #if defined(CONFIG_MPC8220)
133a47a12beSStefan Roese 	unsigned long   bExtUart;
134a47a12beSStefan Roese 	unsigned long   inp_clk;
135a47a12beSStefan Roese 	unsigned long   pci_clk;
136a47a12beSStefan Roese 	unsigned long   vco_clk;
137a47a12beSStefan Roese 	unsigned long   pev_clk;
138a47a12beSStefan Roese 	unsigned long   flb_clk;
139a47a12beSStefan Roese #endif
140a47a12beSStefan Roese 	phys_size_t	ram_size;	/* RAM size */
141a47a12beSStefan Roese 	unsigned long	reset_status;	/* reset status register at boot	*/
142a47a12beSStefan Roese #if defined(CONFIG_MPC83xx)
143a47a12beSStefan Roese 	unsigned long	arbiter_event_attributes;
144a47a12beSStefan Roese 	unsigned long	arbiter_event_address;
145a47a12beSStefan Roese #endif
146a47a12beSStefan Roese 	unsigned long	env_addr;	/* Address  of Environment struct	*/
147a47a12beSStefan Roese 	unsigned long	env_valid;	/* Checksum of Environment valid?	*/
148a47a12beSStefan Roese 	unsigned long	have_console;	/* serial_init() was called		*/
1499558b48aSGraeme Russ #ifdef CONFIG_PRE_CONSOLE_BUFFER
1509558b48aSGraeme Russ 	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */
1519558b48aSGraeme Russ #endif
152a47a12beSStefan Roese #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
153a47a12beSStefan Roese 	unsigned int	dp_alloc_base;
154a47a12beSStefan Roese 	unsigned int	dp_alloc_top;
155a47a12beSStefan Roese #endif
156a47a12beSStefan Roese #if defined(CONFIG_4xx)
157a47a12beSStefan Roese 	u32  uart_clk;
158a47a12beSStefan Roese #endif /* CONFIG_4xx */
159a47a12beSStefan Roese #if defined(CONFIG_SYS_GT_6426x)
160a47a12beSStefan Roese 	unsigned int	mirror_hack[16];
161a47a12beSStefan Roese #endif
162a47a12beSStefan Roese #if defined(CONFIG_A3000)	|| \
163a47a12beSStefan Roese     defined(CONFIG_HIDDEN_DRAGON)  || \
164a47a12beSStefan Roese     defined(CONFIG_MUSENKI)	||  \
165a47a12beSStefan Roese     defined(CONFIG_SANDPOINT)
166a47a12beSStefan Roese 	void *		console_addr;
167a47a12beSStefan Roese #endif
168a47a12beSStefan Roese 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
169a47a12beSStefan Roese #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
170a47a12beSStefan Roese 	unsigned long	fb_base;	/* Base address of framebuffer memory	*/
171a47a12beSStefan Roese #endif
172a47a12beSStefan Roese #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
173a47a12beSStefan Roese 	unsigned long	post_log_word;  /* Record POST activities */
17479843950SValentin Longchamp 	unsigned long	post_log_res; /* success of POST test */
175a47a12beSStefan Roese 	unsigned long	post_init_f_time;  /* When post_init_f started */
176a47a12beSStefan Roese #endif
177a47a12beSStefan Roese #ifdef CONFIG_BOARD_TYPES
178a47a12beSStefan Roese 	unsigned long	board_type;
179a47a12beSStefan Roese #endif
180a47a12beSStefan Roese #ifdef CONFIG_MODEM_SUPPORT
181a47a12beSStefan Roese 	unsigned long do_mdm_init;
182a47a12beSStefan Roese 	unsigned long be_quiet;
183a47a12beSStefan Roese #endif
184a47a12beSStefan Roese #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
185a47a12beSStefan Roese 	unsigned long kbd_status;
186a47a12beSStefan Roese #endif
1872da0fc0dSDirk Eibach #ifdef CONFIG_SYS_FPGA_COUNT
1882da0fc0dSDirk Eibach 	unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
1892da0fc0dSDirk Eibach #endif
190a47a12beSStefan Roese #if defined(CONFIG_WD_MAX_RATE)
191a47a12beSStefan Roese 	unsigned long long wdt_last;	/* trace watch-dog triggering rate */
192a47a12beSStefan Roese #endif
193a47a12beSStefan Roese 	void		**jt;		/* jump table */
19491a76751SWolfgang Denk 	char		env_buf[32];	/* buffer for getenv() before reloc. */
1955cb48582SSimon Glass 	struct arch_global_data arch;	/* architecture-specific data */
196a47a12beSStefan Roese } gd_t;
197a47a12beSStefan Roese 
19847fde91fSMike Frysinger #include <asm-generic/global_data_flags.h>
199a47a12beSStefan Roese 
200a47a12beSStefan Roese #if 1
201a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r2")
202a47a12beSStefan Roese #else /* We could use plain global data, but the resulting code is bigger */
203a47a12beSStefan Roese #define XTRN_DECLARE_GLOBAL_DATA_PTR	extern
204a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR     XTRN_DECLARE_GLOBAL_DATA_PTR \
205a47a12beSStefan Roese 				    gd_t *gd
206a47a12beSStefan Roese #endif
207a47a12beSStefan Roese 
208a47a12beSStefan Roese #endif /* __ASM_GBL_DATA_H */
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