1a47a12beSStefan Roese /* 291a76751SWolfgang Denk * (C) Copyright 2002-2010 3a47a12beSStefan Roese * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4a47a12beSStefan Roese * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6a47a12beSStefan Roese */ 7a47a12beSStefan Roese 8a47a12beSStefan Roese #ifndef __ASM_GBL_DATA_H 9a47a12beSStefan Roese #define __ASM_GBL_DATA_H 10a47a12beSStefan Roese 11a47a12beSStefan Roese #include "config.h" 12a47a12beSStefan Roese #include "asm/types.h" 13a47a12beSStefan Roese 145cb48582SSimon Glass /* Architecture-specific global data */ 155cb48582SSimon Glass struct arch_global_data { 16e9adeca3SSimon Glass #if defined(CONFIG_FSL_ESDHC) 17e9adeca3SSimon Glass u32 sdhc_clk; 185a8dbdc6SYangbo Lu #if defined(CONFIG_FSL_ESDHC_ADAPTER_IDENT) 195a8dbdc6SYangbo Lu u8 sdhc_adapter; 205a8dbdc6SYangbo Lu #endif 21e9adeca3SSimon Glass #endif 22*87e4c602SChristophe Leroy #if defined(CONFIG_MPC8xx) 23907208c4SChristophe Leroy unsigned long brg_clk; 24907208c4SChristophe Leroy #endif 251206c184SSimon Glass #if defined(CONFIG_CPM2) 26748cd059SSimon Glass /* There are many clocks on the MPC8260 - see page 9-5 */ 27748cd059SSimon Glass unsigned long vco_out; 28748cd059SSimon Glass unsigned long cpm_clk; 29748cd059SSimon Glass unsigned long scc_clk; 301206c184SSimon Glass unsigned long brg_clk; 311206c184SSimon Glass #endif 32c6731fe2SSimon Glass /* TODO: sjg@chromium.org: Should these be unslgned long? */ 33a47a12beSStefan Roese #if defined(CONFIG_MPC83xx) 34a47a12beSStefan Roese /* There are other clocks in the MPC83XX */ 35a47a12beSStefan Roese u32 csb_clk; 367c619ddcSIlya Yanok # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 377c619ddcSIlya Yanok defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) 38a47a12beSStefan Roese u32 tsec1_clk; 39a47a12beSStefan Roese u32 tsec2_clk; 40a47a12beSStefan Roese u32 usbdr_clk; 41a88731a6SGerlando Falauto # elif defined(CONFIG_MPC8309) 42a88731a6SGerlando Falauto u32 usbdr_clk; 43a47a12beSStefan Roese # endif 44a47a12beSStefan Roese # if defined(CONFIG_MPC834x) 45a47a12beSStefan Roese u32 usbmph_clk; 46a47a12beSStefan Roese # endif /* CONFIG_MPC834x */ 47a47a12beSStefan Roese # if defined(CONFIG_MPC8315) 48a47a12beSStefan Roese u32 tdm_clk; 49a47a12beSStefan Roese # endif 50a47a12beSStefan Roese u32 core_clk; 51a47a12beSStefan Roese u32 enc_clk; 52a47a12beSStefan Roese u32 lbiu_clk; 53a47a12beSStefan Roese u32 lclk_clk; 547c619ddcSIlya Yanok # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ 557c619ddcSIlya Yanok defined(CONFIG_MPC837x) 56a47a12beSStefan Roese u32 pciexp1_clk; 57a47a12beSStefan Roese u32 pciexp2_clk; 58a47a12beSStefan Roese # endif 59a47a12beSStefan Roese # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) 60a47a12beSStefan Roese u32 sata_clk; 61a47a12beSStefan Roese # endif 62a47a12beSStefan Roese # if defined(CONFIG_MPC8360) 63a47a12beSStefan Roese u32 mem_sec_clk; 64a47a12beSStefan Roese # endif /* CONFIG_MPC8360 */ 65a47a12beSStefan Roese #endif 6667ac13b1SSimon Glass #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 6767ac13b1SSimon Glass u32 lbc_clk; 6867ac13b1SSimon Glass void *cpu; 6967ac13b1SSimon Glass #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ 70609e6ec3SSimon Glass #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \ 71609e6ec3SSimon Glass defined(CONFIG_MPC86xx) 72609e6ec3SSimon Glass u32 i2c1_clk; 73609e6ec3SSimon Glass u32 i2c2_clk; 74609e6ec3SSimon Glass #endif 7545bae2e3SSimon Glass #if defined(CONFIG_QE) 7645bae2e3SSimon Glass u32 qe_clk; 7745bae2e3SSimon Glass u32 brg_clk; 7845bae2e3SSimon Glass uint mp_alloc_base; 7945bae2e3SSimon Glass uint mp_alloc_top; 8045bae2e3SSimon Glass #endif /* CONFIG_QE */ 818670dbc9SSimon Glass #if defined(CONFIG_FSL_LAW) 828670dbc9SSimon Glass u32 used_laws; 838670dbc9SSimon Glass #endif 847c80c6c5SSimon Glass #if defined(CONFIG_E500) 857c80c6c5SSimon Glass u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; 867c80c6c5SSimon Glass #endif 873c4c308cSSimon Glass unsigned long reset_status; /* reset status register at boot */ 8843e60814SSimon Glass #if defined(CONFIG_MPC83xx) 8943e60814SSimon Glass unsigned long arbiter_event_attributes; 9043e60814SSimon Glass unsigned long arbiter_event_address; 9143e60814SSimon Glass #endif 928f3086aaSSimon Glass #if defined(CONFIG_CPM2) 936bb9ba72SSimon Glass unsigned int dp_alloc_base; 946bb9ba72SSimon Glass unsigned int dp_alloc_top; 956bb9ba72SSimon Glass #endif 96923a662fSSimon Glass #ifdef CONFIG_SYS_FPGA_COUNT 97923a662fSSimon Glass unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; 98923a662fSSimon Glass #endif 9904386f65SStefan Roese #if defined(CONFIG_WD_MAX_RATE) 10004386f65SStefan Roese unsigned long long wdt_last; /* trace watch-dog triggering rate */ 10104386f65SStefan Roese #endif 10204386f65SStefan Roese #if defined(CONFIG_LWMON5) 10304386f65SStefan Roese unsigned long kbd_status; 10404386f65SStefan Roese #endif 105c6731fe2SSimon Glass }; 106c6731fe2SSimon Glass 1072ab575e0SSimon Glass #include <asm-generic/global_data.h> 108a47a12beSStefan Roese 109a47a12beSStefan Roese #if 1 110a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") 111a47a12beSStefan Roese #else /* We could use plain global data, but the resulting code is bigger */ 112a47a12beSStefan Roese #define XTRN_DECLARE_GLOBAL_DATA_PTR extern 113a47a12beSStefan Roese #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ 114a47a12beSStefan Roese gd_t *gd 115a47a12beSStefan Roese #endif 116a47a12beSStefan Roese 117a47a12beSStefan Roese #endif /* __ASM_GBL_DATA_H */ 118