xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/fsl_secure_boot.h (revision fb4a2409b46c98672557bb07dec8e873bef1e23c)
17065b7d4SRuchika Gupta /*
27065b7d4SRuchika Gupta  * Copyright 2010-2011 Freescale Semiconductor, Inc.
37065b7d4SRuchika Gupta  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
57065b7d4SRuchika Gupta  */
67065b7d4SRuchika Gupta 
77065b7d4SRuchika Gupta #ifndef __FSL_SECURE_BOOT_H
87065b7d4SRuchika Gupta #define __FSL_SECURE_BOOT_H
97065b7d4SRuchika Gupta 
100d2cff2dSPo Liu #ifdef CONFIG_SECURE_BOOT
117065b7d4SRuchika Gupta #if defined(CONFIG_FSL_CORENET)
127065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE		0xc0000000
13f978f7c2SAneesh Bansal #elif defined(CONFIG_BSC9132QDS)
14f978f7c2SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE		0xc8000000
157065b7d4SRuchika Gupta #else
167065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE		0xce000000
177065b7d4SRuchika Gupta #endif
187065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_WINDOW		0xcff80000
197065b7d4SRuchika Gupta 
20*fb4a2409SAneesh Bansal #if defined(CONFIG_B4860QDS)
21*fb4a2409SAneesh Bansal #define CONFIG_SYS_CPC_REINIT_F
22*fb4a2409SAneesh Bansal #undef CONFIG_SYS_INIT_L3_ADDR
23*fb4a2409SAneesh Bansal #define CONFIG_SYS_INIT_L3_ADDR			0xbff00000
24*fb4a2409SAneesh Bansal #endif
25*fb4a2409SAneesh Bansal 
267065b7d4SRuchika Gupta #endif
270d2cff2dSPo Liu #endif
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