xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/fsl_secure_boot.h (revision e622d9ed3b4a44cd5646654ba12dd6894fd49382)
17065b7d4SRuchika Gupta /*
27065b7d4SRuchika Gupta  * Copyright 2010-2011 Freescale Semiconductor, Inc.
37065b7d4SRuchika Gupta  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
57065b7d4SRuchika Gupta  */
67065b7d4SRuchika Gupta 
77065b7d4SRuchika Gupta #ifndef __FSL_SECURE_BOOT_H
87065b7d4SRuchika Gupta #define __FSL_SECURE_BOOT_H
9e04916a7Sgaurav rana #include <asm/config_mpc85xx.h>
10e04916a7Sgaurav rana 
11e04916a7Sgaurav rana #ifdef CONFIG_SECURE_BOOT
12e04916a7Sgaurav rana #define CONFIG_CMD_ESBC_VALIDATE
13e04916a7Sgaurav rana #define CONFIG_FSL_SEC_MON
14e04916a7Sgaurav rana #define CONFIG_SHA_PROG_HW_ACCEL
15e04916a7Sgaurav rana #define CONFIG_DM
16e04916a7Sgaurav rana #define CONFIG_RSA
17e04916a7Sgaurav rana #define CONFIG_RSA_FREESCALE_EXP
18e04916a7Sgaurav rana #ifndef CONFIG_FSL_CAAM
19e04916a7Sgaurav rana #define CONFIG_FSL_CAAM
20e04916a7Sgaurav rana #endif
21e04916a7Sgaurav rana #endif
227065b7d4SRuchika Gupta 
230d2cff2dSPo Liu #ifdef CONFIG_SECURE_BOOT
247065b7d4SRuchika Gupta #if defined(CONFIG_FSL_CORENET)
257065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE		0xc0000000
26f978f7c2SAneesh Bansal #elif defined(CONFIG_BSC9132QDS)
27f978f7c2SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE		0xc8000000
28b3f0f632SAneesh Bansal #elif defined(CONFIG_C29XPCIE)
29b3f0f632SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE		0xcc000000
307065b7d4SRuchika Gupta #else
317065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE		0xce000000
327065b7d4SRuchika Gupta #endif
337065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_WINDOW		0xcff80000
347065b7d4SRuchika Gupta 
35ca4819dfSAneesh Bansal #if defined(CONFIG_B4860QDS) || \
36ca4819dfSAneesh Bansal 	defined(CONFIG_T4240QDS) || \
372d8db6d3SAneesh Bansal 	defined(CONFIG_T2080QDS) || \
38e47c2a68SAneesh Bansal 	defined(CONFIG_T2080RDB) || \
392d8db6d3SAneesh Bansal 	defined(CONFIG_T1040QDS) || \
40*e622d9edSgaurav rana 	defined(CONFIG_T104xD4QDS) || \
41f6050790SShengzhou Liu 	defined(CONFIG_T104xRDB) || \
42*e622d9edSgaurav rana 	defined(CONFIG_T104xD4RDB) || \
43f6050790SShengzhou Liu 	defined(CONFIG_PPC_T1023) || \
44f6050790SShengzhou Liu 	defined(CONFIG_PPC_T1024)
45fb4a2409SAneesh Bansal #define CONFIG_SYS_CPC_REINIT_F
46e04916a7Sgaurav rana #define CONFIG_KEY_REVOCATION
47fb4a2409SAneesh Bansal #undef CONFIG_SYS_INIT_L3_ADDR
48fb4a2409SAneesh Bansal #define CONFIG_SYS_INIT_L3_ADDR			0xbff00000
49fb4a2409SAneesh Bansal #endif
50fb4a2409SAneesh Bansal 
51e04916a7Sgaurav rana #if defined(CONFIG_C29XPCIE)
52e04916a7Sgaurav rana #define CONFIG_KEY_REVOCATION
53e04916a7Sgaurav rana #endif
54e04916a7Sgaurav rana 
55e04916a7Sgaurav rana #if defined(CONFIG_PPC_P3041)	||	\
56e04916a7Sgaurav rana 	defined(CONFIG_PPC_P4080) ||	\
57e04916a7Sgaurav rana 	defined(CONFIG_PPC_P5020) ||	\
58e04916a7Sgaurav rana 	defined(CONFIG_PPC_P5040) ||	\
59e04916a7Sgaurav rana 	defined(CONFIG_PPC_P2041)
60e04916a7Sgaurav rana 	#define	CONFIG_FSL_TRUST_ARCH_v1
61e04916a7Sgaurav rana #endif
62e04916a7Sgaurav rana 
63e04916a7Sgaurav rana #if defined(CONFIG_FSL_CORENET)
64e04916a7Sgaurav rana /* The key used for verification of next level images
65e04916a7Sgaurav rana  * is picked up from an Extension Table which has
66e04916a7Sgaurav rana  * been verified by the ISBC (Internal Secure boot Code)
67e04916a7Sgaurav rana  * in boot ROM of the SoC
68e04916a7Sgaurav rana  */
69e04916a7Sgaurav rana #define CONFIG_FSL_ISBC_KEY_EXT
70e04916a7Sgaurav rana #endif
71e04916a7Sgaurav rana 
7298cb0efdSgaurav rana #ifndef CONFIG_FIT_SIGNATURE
7398cb0efdSgaurav rana /* The bootscript header address is different for B4860 because the NOR
7498cb0efdSgaurav rana  * mapping is different on B4 due to reduced NOR size.
7598cb0efdSgaurav rana  */
7698cb0efdSgaurav rana #if defined(CONFIG_B4860QDS)
7798cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0xecc00000
7898cb0efdSgaurav rana #elif defined(CONFIG_FSL_CORENET)
7998cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0xe8e00000
8098cb0efdSgaurav rana #elif defined(CONFIG_BSC9132QDS)
8198cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0x88020000
8298cb0efdSgaurav rana #elif defined(CONFIG_C29XPCIE)
8398cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0xec020000
8498cb0efdSgaurav rana #else
8598cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0xee020000
8698cb0efdSgaurav rana #endif
8798cb0efdSgaurav rana 
8898cb0efdSgaurav rana #include <config_fsl_secboot.h>
8998cb0efdSgaurav rana #endif
9098cb0efdSgaurav rana 
917065b7d4SRuchika Gupta #endif
920d2cff2dSPo Liu #endif
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