xref: /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xxx/srio.c (revision a09b9b68d492e978ef0e14cae93ff9cfbc2d3e4b)
1*a09b9b68SKumar Gala /*
2*a09b9b68SKumar Gala  * Copyright 2011 Freescale Semiconductor, Inc.
3*a09b9b68SKumar Gala  *
4*a09b9b68SKumar Gala  * This program is free software; you can redistribute it and/or modify it
5*a09b9b68SKumar Gala  * under the terms of the GNU General Public License as published by the Free
6*a09b9b68SKumar Gala  * Software Foundation; either version 2 of the License, or (at your option)
7*a09b9b68SKumar Gala  * any later version.
8*a09b9b68SKumar Gala  *
9*a09b9b68SKumar Gala  * This program is distributed in the hope that it will be useful,
10*a09b9b68SKumar Gala  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11*a09b9b68SKumar Gala  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12*a09b9b68SKumar Gala  * GNU General Public License for more details.
13*a09b9b68SKumar Gala  *
14*a09b9b68SKumar Gala  * You should have received a copy of the GNU General Public License
15*a09b9b68SKumar Gala  * along with this program; if not, write to the Free Software
16*a09b9b68SKumar Gala  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17*a09b9b68SKumar Gala  * MA 02111-1307 USA
18*a09b9b68SKumar Gala  */
19*a09b9b68SKumar Gala 
20*a09b9b68SKumar Gala #include <common.h>
21*a09b9b68SKumar Gala #include <config.h>
22*a09b9b68SKumar Gala #include <asm/fsl_law.h>
23*a09b9b68SKumar Gala #include <asm/fsl_serdes.h>
24*a09b9b68SKumar Gala 
25*a09b9b68SKumar Gala #if defined(CONFIG_FSL_CORENET)
26*a09b9b68SKumar Gala 	#define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
27*a09b9b68SKumar Gala 	#define _DEVDISR_SRIO2 FSL_CORENET_DEVDISR_SRIO2
28*a09b9b68SKumar Gala 	#define _DEVDISR_RMU   FSL_CORENET_DEVDISR_RMU
29*a09b9b68SKumar Gala 	#define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
30*a09b9b68SKumar Gala #elif defined(CONFIG_MPC85xx)
31*a09b9b68SKumar Gala 	#define _DEVDISR_SRIO1 MPC85xx_DEVDISR_SRIO
32*a09b9b68SKumar Gala 	#define _DEVDISR_SRIO2 MPC85xx_DEVDISR_SRIO
33*a09b9b68SKumar Gala 	#define _DEVDISR_RMU   MPC85xx_DEVDISR_RMSG
34*a09b9b68SKumar Gala 	#define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
35*a09b9b68SKumar Gala #elif defined(CONFIG_MPC86xx)
36*a09b9b68SKumar Gala 	#define _DEVDISR_SRIO1 MPC86xx_DEVDISR_SRIO
37*a09b9b68SKumar Gala 	#define _DEVDISR_SRIO2 MPC86xx_DEVDISR_SRIO
38*a09b9b68SKumar Gala 	#define _DEVDISR_RMU   MPC86xx_DEVDISR_RMSG
39*a09b9b68SKumar Gala 	#define CONFIG_SYS_MPC8xxx_GUTS_ADDR \
40*a09b9b68SKumar Gala 		(&((immap_t *)CONFIG_SYS_IMMR)->im_gur)
41*a09b9b68SKumar Gala #else
42*a09b9b68SKumar Gala #error "No defines for DEVDISR_SRIO"
43*a09b9b68SKumar Gala #endif
44*a09b9b68SKumar Gala 
45*a09b9b68SKumar Gala void srio_init(void)
46*a09b9b68SKumar Gala {
47*a09b9b68SKumar Gala 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR;
48*a09b9b68SKumar Gala 	int srio1_used = 0, srio2_used = 0;
49*a09b9b68SKumar Gala 
50*a09b9b68SKumar Gala 	if (is_serdes_configured(SRIO1)) {
51*a09b9b68SKumar Gala 		set_next_law(CONFIG_SYS_SRIO1_MEM_PHYS,
52*a09b9b68SKumar Gala 				law_size_bits(CONFIG_SYS_SRIO1_MEM_SIZE),
53*a09b9b68SKumar Gala 				LAW_TRGT_IF_RIO_1);
54*a09b9b68SKumar Gala 		srio1_used = 1;
55*a09b9b68SKumar Gala 		printf("SRIO1: enabled\n");
56*a09b9b68SKumar Gala 	} else {
57*a09b9b68SKumar Gala 		printf("SRIO1: disabled\n");
58*a09b9b68SKumar Gala 	}
59*a09b9b68SKumar Gala 
60*a09b9b68SKumar Gala #ifdef CONFIG_SRIO2
61*a09b9b68SKumar Gala 	if (is_serdes_configured(SRIO2)) {
62*a09b9b68SKumar Gala 		set_next_law(CONFIG_SYS_SRIO2_MEM_PHYS,
63*a09b9b68SKumar Gala 				law_size_bits(CONFIG_SYS_SRIO2_MEM_SIZE),
64*a09b9b68SKumar Gala 				LAW_TRGT_IF_RIO_2);
65*a09b9b68SKumar Gala 		srio2_used = 1;
66*a09b9b68SKumar Gala 		printf("SRIO2: enabled\n");
67*a09b9b68SKumar Gala 	} else {
68*a09b9b68SKumar Gala 		printf("SRIO2: disabled\n");
69*a09b9b68SKumar Gala 	}
70*a09b9b68SKumar Gala #endif
71*a09b9b68SKumar Gala 
72*a09b9b68SKumar Gala #ifdef CONFIG_FSL_CORENET
73*a09b9b68SKumar Gala 	/* On FSL_CORENET devices we can disable individual ports */
74*a09b9b68SKumar Gala 	if (!srio1_used)
75*a09b9b68SKumar Gala 		setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO1);
76*a09b9b68SKumar Gala 	if (!srio2_used)
77*a09b9b68SKumar Gala 		setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO2);
78*a09b9b68SKumar Gala #endif
79*a09b9b68SKumar Gala 
80*a09b9b68SKumar Gala 	/* neither port is used - disable everything */
81*a09b9b68SKumar Gala 	if (!srio1_used && !srio2_used) {
82*a09b9b68SKumar Gala 		setbits_be32(&gur->devdisr, _DEVDISR_SRIO1);
83*a09b9b68SKumar Gala 		setbits_be32(&gur->devdisr, _DEVDISR_SRIO2);
84*a09b9b68SKumar Gala 		setbits_be32(&gur->devdisr, _DEVDISR_RMU);
85*a09b9b68SKumar Gala 	}
86*a09b9b68SKumar Gala }
87