1 /* 2 * (C) Copyright 2000 3 * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <mpc8xx.h> 10 #include <asm/io.h> 11 12 void mpc8xx_reginfo(void) 13 { 14 immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR; 15 memctl8xx_t __iomem *memctl = &immap->im_memctl; 16 sysconf8xx_t __iomem *sysconf = &immap->im_siu_conf; 17 sit8xx_t __iomem *timers = &immap->im_sit; 18 19 /* Hopefully more PowerPC knowledgable people will add code to display 20 * other useful registers 21 */ 22 23 printf("\nSystem Configuration registers\n" 24 "\tIMMR\t0x%08X\n", get_immr(0)); 25 26 printf("\tSIUMCR\t0x%08X", in_be32(&sysconf->sc_siumcr)); 27 printf("\tSYPCR\t0x%08X\n", in_be32(&sysconf->sc_sypcr)); 28 29 printf("\tSWT\t0x%08X", in_be32(&sysconf->sc_swt)); 30 printf("\tSWSR\t0x%04X\n", in_be16(&sysconf->sc_swsr)); 31 32 printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n", 33 in_be32(&sysconf->sc_sipend), in_be32(&sysconf->sc_simask)); 34 printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n", 35 in_be32(&sysconf->sc_siel), in_be32(&sysconf->sc_sivec)); 36 printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n", 37 in_be32(&sysconf->sc_tesr), in_be32(&sysconf->sc_sdcr)); 38 39 printf("Memory Controller Registers\n"); 40 printf("\tBR0\t0x%08X\tOR0\t0x%08X\n", in_be32(&memctl->memc_br0), 41 in_be32(&memctl->memc_or0)); 42 printf("\tBR1\t0x%08X\tOR1\t0x%08X\n", in_be32(&memctl->memc_br1), 43 in_be32(&memctl->memc_or1)); 44 printf("\tBR2\t0x%08X\tOR2\t0x%08X\n", in_be32(&memctl->memc_br2), 45 in_be32(&memctl->memc_or2)); 46 printf("\tBR3\t0x%08X\tOR3\t0x%08X\n", in_be32(&memctl->memc_br3), 47 in_be32(&memctl->memc_or3)); 48 printf("\tBR4\t0x%08X\tOR4\t0x%08X\n", in_be32(&memctl->memc_br4), 49 in_be32(&memctl->memc_or4)); 50 printf("\tBR5\t0x%08X\tOR5\t0x%08X\n", in_be32(&memctl->memc_br5), 51 in_be32(&memctl->memc_or5)); 52 printf("\tBR6\t0x%08X\tOR6\t0x%08X\n", in_be32(&memctl->memc_br6), 53 in_be32(&memctl->memc_or6)); 54 printf("\tBR7\t0x%08X\tOR7\t0x%08X\n", in_be32(&memctl->memc_br7), 55 in_be32(&memctl->memc_or7)); 56 printf("\n\tmamr\t0x%08X\tmbmr\t0x%08X\n", in_be32(&memctl->memc_mamr), 57 in_be32(&memctl->memc_mbmr)); 58 printf("\tmstat\t0x%04X\tmptpr\t0x%04X\n", in_be16(&memctl->memc_mstat), 59 in_be16(&memctl->memc_mptpr)); 60 printf("\tmdr\t0x%08X\n", in_be32(&memctl->memc_mdr)); 61 62 printf("\nSystem Integration Timers\n"); 63 printf("\tTBSCR\t0x%04X\tRTCSC\t0x%04X\n", 64 in_be16(&timers->sit_tbscr), in_be16(&timers->sit_rtcsc)); 65 printf("\tPISCR\t0x%04X\n", in_be16(&timers->sit_piscr)); 66 67 /* 68 * May be some CPM info here? 69 */ 70 } 71