1*a47a12beSStefan Roese# 2*a47a12beSStefan Roese# Copyright 2007 Freescale Semiconductor, Inc. 3*a47a12beSStefan Roese# (C) Copyright 2002,2003 Motorola Inc. 4*a47a12beSStefan Roese# Xianghua Xiao,X.Xiao@motorola.com 5*a47a12beSStefan Roese# 6*a47a12beSStefan Roese# (C) Copyright 2004 Freescale Semiconductor. (MC86xx Port) 7*a47a12beSStefan Roese# Jeff Brown 8*a47a12beSStefan Roese# See file CREDITS for list of people who contributed to this 9*a47a12beSStefan Roese# project. 10*a47a12beSStefan Roese# 11*a47a12beSStefan Roese# This program is free software; you can redistribute it and/or 12*a47a12beSStefan Roese# modify it under the terms of the GNU General Public License as 13*a47a12beSStefan Roese# published by the Free Software Foundation; either version 2 of 14*a47a12beSStefan Roese# the License, or (at your option) any later version. 15*a47a12beSStefan Roese# 16*a47a12beSStefan Roese# This program is distributed in the hope that it will be useful, 17*a47a12beSStefan Roese# but WITHOUT ANY WARRANTY; without even the implied warranty of 18*a47a12beSStefan Roese# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19*a47a12beSStefan Roese# GNU General Public License for more details. 20*a47a12beSStefan Roese# 21*a47a12beSStefan Roese# You should have received a copy of the GNU General Public License 22*a47a12beSStefan Roese# along with this program; if not, write to the Free Software 23*a47a12beSStefan Roese# Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24*a47a12beSStefan Roese# MA 02111-1307 USA 25*a47a12beSStefan Roese# 26*a47a12beSStefan Roese 27*a47a12beSStefan Roeseinclude $(TOPDIR)/config.mk 28*a47a12beSStefan Roese 29*a47a12beSStefan RoeseLIB = $(obj)lib$(CPU).a 30*a47a12beSStefan Roese 31*a47a12beSStefan RoeseSTART = start.o 32*a47a12beSStefan Roese 33*a47a12beSStefan RoeseSOBJS-y += cache.o 34*a47a12beSStefan RoeseSOBJS-$(CONFIG_MP) += release.o 35*a47a12beSStefan Roese 36*a47a12beSStefan RoeseCOBJS-y += cpu.o 37*a47a12beSStefan RoeseCOBJS-y += cpu_init.o 38*a47a12beSStefan Roese# 8610 & 8641 are identical w/regards to DDR 39*a47a12beSStefan RoeseCOBJS-$(CONFIG_MPC8610) += ddr-8641.o 40*a47a12beSStefan RoeseCOBJS-$(CONFIG_MPC8641) += ddr-8641.o 41*a47a12beSStefan RoeseCOBJS-$(CONFIG_OF_LIBFDT) += fdt.o 42*a47a12beSStefan RoeseCOBJS-y += interrupts.o 43*a47a12beSStefan RoeseCOBJS-$(CONFIG_MP) += mp.o 44*a47a12beSStefan RoeseCOBJS-y += speed.o 45*a47a12beSStefan RoeseCOBJS-y += traps.o 46*a47a12beSStefan Roese 47*a47a12beSStefan RoeseSRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) 48*a47a12beSStefan RoeseOBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) 49*a47a12beSStefan RoeseSTART := $(addprefix $(obj),$(START)) 50*a47a12beSStefan Roese 51*a47a12beSStefan Roeseall: $(obj).depend $(START) $(LIB) 52*a47a12beSStefan Roese 53*a47a12beSStefan Roese$(LIB): $(OBJS) 54*a47a12beSStefan Roese $(AR) $(ARFLAGS) $@ $(ASOBJS) $(OBJS) 55*a47a12beSStefan Roese 56*a47a12beSStefan Roese######################################################################### 57*a47a12beSStefan Roese 58*a47a12beSStefan Roese# defines $(obj).depend target 59*a47a12beSStefan Roeseinclude $(SRCTREE)/rules.mk 60*a47a12beSStefan Roese 61*a47a12beSStefan Roesesinclude $(obj).depend 62*a47a12beSStefan Roese 63*a47a12beSStefan Roese######################################################################### 64