1c97cd1baSScott Wood/* 2c97cd1baSScott Wood * (C) Copyright 2006 3c97cd1baSScott Wood * Wolfgang Denk, DENX Software Engineering, wd@denx.de 4c97cd1baSScott Wood * 5c97cd1baSScott Wood * Copyright 2009 Freescale Semiconductor, Inc. 6c97cd1baSScott Wood * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8c97cd1baSScott Wood */ 9c97cd1baSScott Wood 10c97cd1baSScott Wood#include "config.h" /* CONFIG_BOARDDIR */ 11c97cd1baSScott Wood 12c97cd1baSScott WoodOUTPUT_ARCH(powerpc) 135df572f0SYing Zhang#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 145df572f0SYing ZhangPHDRS 155df572f0SYing Zhang{ 165df572f0SYing Zhang text PT_LOAD; 175df572f0SYing Zhang bss PT_LOAD; 185df572f0SYing Zhang} 195df572f0SYing Zhang#endif 20c97cd1baSScott WoodSECTIONS 21c97cd1baSScott Wood{ 22c97cd1baSScott Wood . = CONFIG_SPL_TEXT_BASE; 23c97cd1baSScott Wood .text : { 24c97cd1baSScott Wood *(.text*) 25c97cd1baSScott Wood } 26c97cd1baSScott Wood _etext = .; 27c97cd1baSScott Wood 28c97cd1baSScott Wood .reloc : { 29c97cd1baSScott Wood _GOT2_TABLE_ = .; 30c97cd1baSScott Wood KEEP(*(.got2)) 31c97cd1baSScott Wood KEEP(*(.got)) 32c97cd1baSScott Wood PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); 33c97cd1baSScott Wood _FIXUP_TABLE_ = .; 34c97cd1baSScott Wood KEEP(*(.fixup)) 35c97cd1baSScott Wood } 36c97cd1baSScott Wood __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 37c97cd1baSScott Wood __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 38c97cd1baSScott Wood 39c97cd1baSScott Wood . = ALIGN(8); 40c97cd1baSScott Wood .data : { 41c97cd1baSScott Wood *(.rodata*) 42c97cd1baSScott Wood *(.data*) 43c97cd1baSScott Wood *(.sdata*) 44c97cd1baSScott Wood } 45c97cd1baSScott Wood _edata = .; 46c97cd1baSScott Wood 47*bb0dc108SYing Zhang . = .; 48*bb0dc108SYing Zhang __start___ex_table = .; 49*bb0dc108SYing Zhang __ex_table : { *(__ex_table) } 50*bb0dc108SYing Zhang __stop___ex_table = .; 51*bb0dc108SYing Zhang 52c97cd1baSScott Wood . = ALIGN(8); 53c97cd1baSScott Wood __init_begin = .; 54c97cd1baSScott Wood __init_end = .; 55c97cd1baSScott Wood/* FIXME for non-NAND SPL */ 56c97cd1baSScott Wood#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ 57c97cd1baSScott Wood .bootpg ADDR(.text) + 0x1000 : 58c97cd1baSScott Wood { 593a88179dSPrabhakar Kushwaha arch/powerpc/cpu/mpc85xx/start.o (.bootpg) 60c97cd1baSScott Wood } 61c97cd1baSScott Wood#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ 62c97cd1baSScott Wood#elif defined(CONFIG_FSL_ELBC) 63c97cd1baSScott Wood#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ 64c97cd1baSScott Wood#else 65c97cd1baSScott Wood#error unknown NAND controller 66c97cd1baSScott Wood#endif 675df572f0SYing Zhang#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 685df572f0SYing Zhang .bootpg ADDR(.text) - 0x1000 : 695df572f0SYing Zhang { 705df572f0SYing Zhang KEEP(*(.bootpg)) 715df572f0SYing Zhang } :text = 0xffff 725df572f0SYing Zhang#else 73c97cd1baSScott Wood .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { 74c97cd1baSScott Wood KEEP(*(.resetvec)) 75c97cd1baSScott Wood } = 0xffff 765df572f0SYing Zhang#endif 77c97cd1baSScott Wood 78c97cd1baSScott Wood /* 79c97cd1baSScott Wood * Make sure that the bss segment isn't linked at 0x0, otherwise its 80c97cd1baSScott Wood * address won't be updated during relocation fixups. 81c97cd1baSScott Wood */ 82c97cd1baSScott Wood . |= 0x10; 83c97cd1baSScott Wood 8467ad0d52SYing Zhang . = ALIGN(4); 85c97cd1baSScott Wood __bss_start = .; 86c97cd1baSScott Wood .bss : { 87c97cd1baSScott Wood *(.sbss*) 88c97cd1baSScott Wood *(.bss*) 89c97cd1baSScott Wood } 9067ad0d52SYing Zhang . = ALIGN(4); 913929fb0aSSimon Glass __bss_end = .; 92c97cd1baSScott Wood} 93