1*b9735cbaSScott Wood /* 2*b9735cbaSScott Wood * Copyright 2009 Freescale Semiconductor, Inc. 3*b9735cbaSScott Wood * 4*b9735cbaSScott Wood * See file CREDITS for list of people who contributed to this 5*b9735cbaSScott Wood * project. 6*b9735cbaSScott Wood * 7*b9735cbaSScott Wood * This program is free software; you can redistribute it and/or 8*b9735cbaSScott Wood * modify it under the terms of the GNU General Public License as 9*b9735cbaSScott Wood * published by the Free Software Foundation; either version 2 of 10*b9735cbaSScott Wood * the License, or (at your option) any later version. 11*b9735cbaSScott Wood * 12*b9735cbaSScott Wood * This program is distributed in the hope that it will be useful, 13*b9735cbaSScott Wood * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*b9735cbaSScott Wood * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*b9735cbaSScott Wood * GNU General Public License for more details. 16*b9735cbaSScott Wood * 17*b9735cbaSScott Wood * You should have received a copy of the GNU General Public License 18*b9735cbaSScott Wood * along with this program; if not, write to the Free Software 19*b9735cbaSScott Wood * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20*b9735cbaSScott Wood * MA 02111-1307 USA 21*b9735cbaSScott Wood */ 22*b9735cbaSScott Wood 23*b9735cbaSScott Wood #include <common.h> 24*b9735cbaSScott Wood #include <asm/processor.h> 25*b9735cbaSScott Wood #include <asm/global_data.h> 26*b9735cbaSScott Wood #include <asm/fsl_ifc.h> 27*b9735cbaSScott Wood #include <asm/io.h> 28*b9735cbaSScott Wood 29*b9735cbaSScott Wood DECLARE_GLOBAL_DATA_PTR; 30*b9735cbaSScott Wood 31*b9735cbaSScott Wood void cpu_init_f(void) 32*b9735cbaSScott Wood { 33*b9735cbaSScott Wood #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) 34*b9735cbaSScott Wood ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; 35*b9735cbaSScott Wood 36*b9735cbaSScott Wood out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR); 37*b9735cbaSScott Wood 38*b9735cbaSScott Wood /* set MBECCDIS=1, SBECCDIS=1 */ 39*b9735cbaSScott Wood out_be32(&l2cache->l2errdis, 40*b9735cbaSScott Wood (MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC)); 41*b9735cbaSScott Wood 42*b9735cbaSScott Wood /* set L2E=1 & L2SRAM=001 */ 43*b9735cbaSScott Wood out_be32(&l2cache->l2ctl, 44*b9735cbaSScott Wood (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); 45*b9735cbaSScott Wood #endif 46*b9735cbaSScott Wood } 47*b9735cbaSScott Wood 48*b9735cbaSScott Wood #ifndef CONFIG_SYS_FSL_TBCLK_DIV 49*b9735cbaSScott Wood #define CONFIG_SYS_FSL_TBCLK_DIV 8 50*b9735cbaSScott Wood #endif 51*b9735cbaSScott Wood 52*b9735cbaSScott Wood void udelay(unsigned long usec) 53*b9735cbaSScott Wood { 54*b9735cbaSScott Wood u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000); 55*b9735cbaSScott Wood u32 ticks = ticks_per_usec * usec; 56*b9735cbaSScott Wood u32 s = mfspr(SPRN_TBRL); 57*b9735cbaSScott Wood 58*b9735cbaSScott Wood while ((mfspr(SPRN_TBRL) - s) < ticks); 59*b9735cbaSScott Wood } 60