xref: /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/p4080_ids.c (revision 9809ccdd4c25a068aa8bef883ab66e61ec5fa18b)
1db977abfSKumar Gala /*
233e68354SLaurentiu TUDOR  * Copyright 2010-2011 Freescale Semiconductor, Inc.
3db977abfSKumar Gala  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
5db977abfSKumar Gala  */
6db977abfSKumar Gala 
7db977abfSKumar Gala #include <common.h>
8db977abfSKumar Gala #include <asm/fsl_portals.h>
9db977abfSKumar Gala #include <asm/fsl_liodn.h>
10db977abfSKumar Gala 
1158b2f96eSKumar Gala #ifdef CONFIG_SYS_DPAA_QBMAN
12db977abfSKumar Gala struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
13db977abfSKumar Gala 	/* dqrr liodn, frame data liodn, liodn off, sdest */
14db977abfSKumar Gala 	SET_QP_INFO( 1,  2,  1, 0),
15db977abfSKumar Gala 	SET_QP_INFO( 3,  4,  2, 1),
16db977abfSKumar Gala 	SET_QP_INFO( 5,  6,  3, 2),
17db977abfSKumar Gala 	SET_QP_INFO( 7,  8,  4, 3),
18db977abfSKumar Gala 	SET_QP_INFO( 9, 10,  5, 4),
19db977abfSKumar Gala 	SET_QP_INFO(11, 12,  6, 5),
20db977abfSKumar Gala 	SET_QP_INFO(13, 14,  7, 6),
21db977abfSKumar Gala 	SET_QP_INFO(15, 16,  8, 7),
22db977abfSKumar Gala 	SET_QP_INFO(17, 18,  9, 0), /* for now sdest to 0 */
23db977abfSKumar Gala 	SET_QP_INFO(19, 20, 10, 0), /* for now sdest to 0 */
24db977abfSKumar Gala };
2558b2f96eSKumar Gala #endif
26db977abfSKumar Gala 
271a0c6421SKumar Gala struct srio_liodn_id_table srio_liodn_tbl[] = {
281a0c6421SKumar Gala 	SET_SRIO_LIODN_1(1, 198),
291a0c6421SKumar Gala 	SET_SRIO_LIODN_1(2, 199),
301a0c6421SKumar Gala };
311a0c6421SKumar Gala int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
321a0c6421SKumar Gala 
33db977abfSKumar Gala struct liodn_id_table liodn_tbl[] = {
34db977abfSKumar Gala 	SET_USB_LIODN(1, "fsl-usb2-mph", 127),
35db977abfSKumar Gala 	SET_USB_LIODN(2, "fsl-usb2-dr", 157),
36db977abfSKumar Gala 
37db977abfSKumar Gala 	SET_SDHC_LIODN(1, 156),
38db977abfSKumar Gala 
395c5befdaSTimur Tabi 	SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 1, 193),
405c5befdaSTimur Tabi 	SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 2, 194),
415c5befdaSTimur Tabi 	SET_PCI_LIODN(CONFIG_SYS_FSL_PCIE_COMPAT, 3, 195),
42db977abfSKumar Gala 
438d3eaa97STudor Laurentiu 	SET_DMA_LIODN(1, "fsl,eloplus-dma", 196),
448d3eaa97STudor Laurentiu 	SET_DMA_LIODN(2, "fsl,eloplus-dma", 197),
45db977abfSKumar Gala 
461a0c6421SKumar Gala 	SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000),
47db977abfSKumar Gala 
4858b2f96eSKumar Gala #ifdef CONFIG_SYS_DPAA_QBMAN
49db977abfSKumar Gala 	SET_QMAN_LIODN(31),
50db977abfSKumar Gala 	SET_BMAN_LIODN(32),
5158b2f96eSKumar Gala #endif
52db977abfSKumar Gala 	SET_PME_LIODN(128),
53db977abfSKumar Gala };
5458b2f96eSKumar Gala int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
55db977abfSKumar Gala 
56db977abfSKumar Gala #ifdef CONFIG_SYS_DPAA_FMAN
57*97a8d010SIgal Liberman struct fman_liodn_id_table fman1_liodn_tbl[] = {
58db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 0, 11),
59db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 1, 12),
60db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 2, 13),
61db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 3, 14),
62db977abfSKumar Gala 	SET_FMAN_RX_10G_LIODN(1, 0, 15),
63db977abfSKumar Gala };
6458b2f96eSKumar Gala int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
65db977abfSKumar Gala 
66db977abfSKumar Gala #if (CONFIG_SYS_NUM_FMAN == 2)
67*97a8d010SIgal Liberman struct fman_liodn_id_table fman2_liodn_tbl[] = {
68db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(2, 0, 16),
69db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(2, 1, 17),
70db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(2, 2, 18),
71db977abfSKumar Gala 	SET_FMAN_RX_1G_LIODN(2, 3, 19),
72db977abfSKumar Gala 	SET_FMAN_RX_10G_LIODN(2, 0, 20),
73db977abfSKumar Gala };
7458b2f96eSKumar Gala int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl);
75db977abfSKumar Gala #endif
76db977abfSKumar Gala #endif
77db977abfSKumar Gala 
78db977abfSKumar Gala struct liodn_id_table sec_liodn_tbl[] = {
79e95a0611SKim Phillips 	/*
80e95a0611SKim Phillips 	 * We assume currently that all JR are in the same partition
81e95a0611SKim Phillips 	 * and as such they need to represent the same LIODN due to
82e95a0611SKim Phillips 	 * a 4080 rev.2 h/w requirement that DECOs sharing from themselves
83e95a0611SKim Phillips 	 * or from another DECO have the two Non-SEQ LIODN values equal
84e95a0611SKim Phillips 	 */
85e95a0611SKim Phillips 	SET_SEC_JR_LIODN_ENTRY(0, 146, 154), /* (0, 146, 154), */
86e95a0611SKim Phillips 	SET_SEC_JR_LIODN_ENTRY(1, 146, 154), /* (1, 147, 155), */
87e95a0611SKim Phillips 	SET_SEC_JR_LIODN_ENTRY(2, 146, 154), /* (2, 178, 186), */
88e95a0611SKim Phillips 	SET_SEC_JR_LIODN_ENTRY(3, 146, 154), /* (3, 179, 187), */
89db977abfSKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(a, 144),
90db977abfSKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(b, 145),
91db977abfSKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(c, 176),
92db977abfSKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(d, 177),
93db977abfSKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(0, 129, 161),
94db977abfSKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(1, 130, 162),
95db977abfSKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(2, 131, 163),
96db977abfSKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(3, 132, 164),
97db977abfSKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(4, 133, 165),
98db977abfSKumar Gala };
9958b2f96eSKumar Gala int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
100db977abfSKumar Gala 
101db977abfSKumar Gala struct liodn_id_table liodn_bases[] = {
102db977abfSKumar Gala 	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(96, 106),
103db977abfSKumar Gala #ifdef CONFIG_SYS_DPAA_FMAN
104db977abfSKumar Gala 	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
105db977abfSKumar Gala #if (CONFIG_SYS_NUM_FMAN == 2)
106db977abfSKumar Gala 	[FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(64),
107db977abfSKumar Gala #endif
108db977abfSKumar Gala #endif
109db977abfSKumar Gala #ifdef CONFIG_SYS_DPAA_PME
110db977abfSKumar Gala 	[FSL_HW_PORTAL_PME]   = SET_LIODN_BASE_2(116, 133),
111db977abfSKumar Gala #endif
112db977abfSKumar Gala };
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