xref: /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/p3041_ids.c (revision 1a0c64219df1fe4f8c40ed2ecaa0da1b4e0e26f7)
1d5d2cd43SKumar Gala /*
233e68354SLaurentiu TUDOR  * Copyright 2010-2011 Freescale Semiconductor, Inc.
3d5d2cd43SKumar Gala  *
4d5d2cd43SKumar Gala  * See file CREDITS for list of people who contributed to this
5d5d2cd43SKumar Gala  * project.
6d5d2cd43SKumar Gala  *
7d5d2cd43SKumar Gala  * This program is free software; you can redistribute it and/or
8d5d2cd43SKumar Gala  * modify it under the terms of the GNU General Public License as
9d5d2cd43SKumar Gala  * published by the Free Software Foundation; either version 2 of
10d5d2cd43SKumar Gala  * the License, or (at your option) any later version.
11d5d2cd43SKumar Gala  *
12d5d2cd43SKumar Gala  * This program is distributed in the hope that it will be useful,
13d5d2cd43SKumar Gala  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14d5d2cd43SKumar Gala  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15d5d2cd43SKumar Gala  * GNU General Public License for more details.
16d5d2cd43SKumar Gala  *
17d5d2cd43SKumar Gala  * You should have received a copy of the GNU General Public License
18d5d2cd43SKumar Gala  * along with this program; if not, write to the Free Software
19d5d2cd43SKumar Gala  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20d5d2cd43SKumar Gala  * MA 02111-1307 USA
21d5d2cd43SKumar Gala  */
22d5d2cd43SKumar Gala 
23d5d2cd43SKumar Gala #include <common.h>
24d5d2cd43SKumar Gala #include <asm/fsl_portals.h>
25d5d2cd43SKumar Gala #include <asm/fsl_liodn.h>
26d5d2cd43SKumar Gala 
2758b2f96eSKumar Gala #ifdef CONFIG_SYS_DPAA_QBMAN
28d5d2cd43SKumar Gala struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
29d5d2cd43SKumar Gala 	/* dqrr liodn, frame data liodn, liodn off, sdest */
30d5d2cd43SKumar Gala 	SET_QP_INFO(1, 2, 1, 0),
31d5d2cd43SKumar Gala 	SET_QP_INFO(3, 4, 2, 1),
32d5d2cd43SKumar Gala 	SET_QP_INFO(5, 6, 3, 2),
33d5d2cd43SKumar Gala 	SET_QP_INFO(7, 8, 4, 3),
3434fdbdf8SHaiying Wang 	SET_QP_INFO(9, 10, 5, 0),
3534fdbdf8SHaiying Wang 	SET_QP_INFO(11, 12, 1, 1),
3634fdbdf8SHaiying Wang 	SET_QP_INFO(13, 14, 2, 2),
3734fdbdf8SHaiying Wang 	SET_QP_INFO(15, 16, 3, 3),
3834fdbdf8SHaiying Wang 	SET_QP_INFO(17, 18, 4, 0), /* for now sdest to 0 */
3934fdbdf8SHaiying Wang 	SET_QP_INFO(19, 20, 5, 0), /* for now sdest to 0 */
40d5d2cd43SKumar Gala };
4158b2f96eSKumar Gala #endif
42d5d2cd43SKumar Gala 
43*1a0c6421SKumar Gala struct srio_liodn_id_table srio_liodn_tbl[] = {
44*1a0c6421SKumar Gala 	SET_SRIO_LIODN_2(1, 199, 200),
45*1a0c6421SKumar Gala 	SET_SRIO_LIODN_2(2, 201, 202),
46*1a0c6421SKumar Gala };
47*1a0c6421SKumar Gala int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
48*1a0c6421SKumar Gala 
49d5d2cd43SKumar Gala struct liodn_id_table liodn_tbl[] = {
5058b2f96eSKumar Gala #ifdef CONFIG_SYS_DPAA_QBMAN
51d5d2cd43SKumar Gala 	SET_QMAN_LIODN(31),
52d5d2cd43SKumar Gala 	SET_BMAN_LIODN(32),
5358b2f96eSKumar Gala #endif
54d5d2cd43SKumar Gala 
55d5d2cd43SKumar Gala 	SET_SDHC_LIODN(1, 64),
56d5d2cd43SKumar Gala 
57d5d2cd43SKumar Gala 	SET_PME_LIODN(117),
58d5d2cd43SKumar Gala 
59d5d2cd43SKumar Gala 	SET_USB_LIODN(1, "fsl-usb2-mph", 125),
60d5d2cd43SKumar Gala 	SET_USB_LIODN(2, "fsl-usb2-dr", 126),
61d5d2cd43SKumar Gala 
62d5d2cd43SKumar Gala 	SET_SATA_LIODN(1, 127),
63d5d2cd43SKumar Gala 	SET_SATA_LIODN(2, 128),
64d5d2cd43SKumar Gala 
6533e68354SLaurentiu TUDOR 	SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
6633e68354SLaurentiu TUDOR 	SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
6733e68354SLaurentiu TUDOR 	SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195),
6833e68354SLaurentiu TUDOR 	SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
69d5d2cd43SKumar Gala 
70d5d2cd43SKumar Gala 	SET_DMA_LIODN(1, 197),
71d5d2cd43SKumar Gala 	SET_DMA_LIODN(2, 198),
72d5d2cd43SKumar Gala 
73d5d2cd43SKumar Gala 	SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
74d5d2cd43SKumar Gala 	SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
75d5d2cd43SKumar Gala 	SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
76d5d2cd43SKumar Gala 	SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
77d5d2cd43SKumar Gala };
7858b2f96eSKumar Gala int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
79d5d2cd43SKumar Gala 
80d5d2cd43SKumar Gala #ifdef CONFIG_SYS_DPAA_FMAN
81d5d2cd43SKumar Gala struct liodn_id_table fman1_liodn_tbl[] = {
82d5d2cd43SKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 0, 10),
83d5d2cd43SKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 1, 11),
84d5d2cd43SKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 2, 12),
85d5d2cd43SKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 3, 13),
86d5d2cd43SKumar Gala 	SET_FMAN_RX_1G_LIODN(1, 4, 14),
87d5d2cd43SKumar Gala 	SET_FMAN_RX_10G_LIODN(1, 0, 15),
88d5d2cd43SKumar Gala };
8958b2f96eSKumar Gala int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
90d5d2cd43SKumar Gala #endif
91d5d2cd43SKumar Gala 
92d5d2cd43SKumar Gala struct liodn_id_table sec_liodn_tbl[] = {
93d5d2cd43SKumar Gala 	SET_SEC_JR_LIODN_ENTRY(0, 129, 130),
94d5d2cd43SKumar Gala 	SET_SEC_JR_LIODN_ENTRY(1, 131, 132),
95d5d2cd43SKumar Gala 	SET_SEC_JR_LIODN_ENTRY(2, 133, 134),
96d5d2cd43SKumar Gala 	SET_SEC_JR_LIODN_ENTRY(3, 135, 136),
97d5d2cd43SKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(a, 154),
98d5d2cd43SKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(b, 155),
99d5d2cd43SKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(c, 156),
100d5d2cd43SKumar Gala 	SET_SEC_RTIC_LIODN_ENTRY(d, 157),
101d5d2cd43SKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(0, 97, 98),
102d5d2cd43SKumar Gala 	SET_SEC_DECO_LIODN_ENTRY(1, 99, 100),
103d5d2cd43SKumar Gala };
10458b2f96eSKumar Gala int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
105d5d2cd43SKumar Gala 
106d5d2cd43SKumar Gala struct liodn_id_table liodn_bases[] = {
107d5d2cd43SKumar Gala 	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(64, 100),
108d5d2cd43SKumar Gala #ifdef CONFIG_SYS_DPAA_FMAN
109d5d2cd43SKumar Gala 	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
110d5d2cd43SKumar Gala #endif
111d5d2cd43SKumar Gala #ifdef CONFIG_SYS_DPAA_PME
112d5d2cd43SKumar Gala 	[FSL_HW_PORTAL_PME]   = SET_LIODN_BASE_2(136, 172),
113d5d2cd43SKumar Gala #endif
114d5d2cd43SKumar Gala };
115