1*5ba40eecSKumar Gala /* 2*5ba40eecSKumar Gala * Copyright 2010 Freescale Semiconductor, Inc. 3*5ba40eecSKumar Gala * 4*5ba40eecSKumar Gala * See file CREDITS for list of people who contributed to this 5*5ba40eecSKumar Gala * project. 6*5ba40eecSKumar Gala * 7*5ba40eecSKumar Gala * This program is free software; you can redistribute it and/or 8*5ba40eecSKumar Gala * modify it under the terms of the GNU General Public License as 9*5ba40eecSKumar Gala * published by the Free Software Foundation; either version 2 of 10*5ba40eecSKumar Gala * the License, or (at your option) any later version. 11*5ba40eecSKumar Gala * 12*5ba40eecSKumar Gala * This program is distributed in the hope that it will be useful, 13*5ba40eecSKumar Gala * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*5ba40eecSKumar Gala * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*5ba40eecSKumar Gala * GNU General Public License for more details. 16*5ba40eecSKumar Gala * 17*5ba40eecSKumar Gala * You should have received a copy of the GNU General Public License 18*5ba40eecSKumar Gala * along with this program; if not, write to the Free Software 19*5ba40eecSKumar Gala * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20*5ba40eecSKumar Gala * MA 02111-1307 USA 21*5ba40eecSKumar Gala */ 22*5ba40eecSKumar Gala 23*5ba40eecSKumar Gala #include <config.h> 24*5ba40eecSKumar Gala #include <common.h> 25*5ba40eecSKumar Gala #include <asm/io.h> 26*5ba40eecSKumar Gala #include <asm/immap_85xx.h> 27*5ba40eecSKumar Gala #include <asm/fsl_serdes.h> 28*5ba40eecSKumar Gala 29*5ba40eecSKumar Gala #define SRDS1_MAX_LANES 8 30*5ba40eecSKumar Gala 31*5ba40eecSKumar Gala static u32 serdes1_prtcl_map; 32*5ba40eecSKumar Gala 33*5ba40eecSKumar Gala static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { 34*5ba40eecSKumar Gala [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 35*5ba40eecSKumar Gala [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, 36*5ba40eecSKumar Gala [0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, 37*5ba40eecSKumar Gala [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, 38*5ba40eecSKumar Gala [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}, 39*5ba40eecSKumar Gala }; 40*5ba40eecSKumar Gala 41*5ba40eecSKumar Gala int is_serdes_configured(enum srds_prtcl prtcl) 42*5ba40eecSKumar Gala { 43*5ba40eecSKumar Gala return (1 << prtcl) & serdes1_prtcl_map; 44*5ba40eecSKumar Gala } 45*5ba40eecSKumar Gala 46*5ba40eecSKumar Gala void fsl_serdes_init(void) 47*5ba40eecSKumar Gala { 48*5ba40eecSKumar Gala ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 49*5ba40eecSKumar Gala u32 pordevsr = in_be32(&gur->pordevsr); 50*5ba40eecSKumar Gala u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 51*5ba40eecSKumar Gala MPC85xx_PORDEVSR_IO_SEL_SHIFT; 52*5ba40eecSKumar Gala int lane; 53*5ba40eecSKumar Gala 54*5ba40eecSKumar Gala debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); 55*5ba40eecSKumar Gala 56*5ba40eecSKumar Gala if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { 57*5ba40eecSKumar Gala printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); 58*5ba40eecSKumar Gala return; 59*5ba40eecSKumar Gala } 60*5ba40eecSKumar Gala 61*5ba40eecSKumar Gala for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { 62*5ba40eecSKumar Gala enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; 63*5ba40eecSKumar Gala serdes1_prtcl_map |= (1 << lane_prtcl); 64*5ba40eecSKumar Gala } 65*5ba40eecSKumar Gala } 66