xref: /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/cpu_init_early.c (revision fb855f43a1cdcda5f93d971063330505548d5919)
1 /*
2  * Copyright 2009 Freescale Semiconductor, Inc
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17  * MA 02111-1307 USA
18  */
19 
20 #include <common.h>
21 #include <asm/processor.h>
22 #include <asm/mmu.h>
23 #include <asm/fsl_law.h>
24 #include <asm/io.h>
25 
26 DECLARE_GLOBAL_DATA_PTR;
27 
28 /* We run cpu_init_early_f in AS = 1 */
29 void cpu_init_early_f(void)
30 {
31 	u32 mas0, mas1, mas2, mas3, mas7;
32 	int i;
33 #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
34 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
35 #endif
36 
37 	/* Pointer is writable since we allocated a register for it */
38 	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
39 
40 	/*
41 	 * Clear initial global data
42 	 *   we don't use memset so we can share this code with NAND_SPL
43 	 */
44 	for (i = 0; i < sizeof(gd_t); i++)
45 		((char *)gd)[i] = 0;
46 
47 	mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(13);
48 	mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M);
49 	mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, MAS2_I|MAS2_G);
50 	mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS, 0, MAS3_SW|MAS3_SR);
51 	mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_PHYS);
52 
53 	write_tlb(mas0, mas1, mas2, mas3, mas7);
54 
55 /*
56  * Work Around for IFC Erratum A-003549. This issue is P1010
57  * specific. LCLK(a free running clk signal) is muxed with IFC_CS3 on P1010 SOC
58  * Hence specifically selecting CS3.
59  */
60 #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
61 	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_LCLK_IFC_CS3);
62 #endif
63 
64 	init_laws();
65 	invalidate_tlb(1);
66 	init_tlbs();
67 }
68