1*a47a12beSStefan Roese /* 2*a47a12beSStefan Roese * Copyright 2009 Freescale Semiconductor, Inc 3*a47a12beSStefan Roese * 4*a47a12beSStefan Roese * This program is free software; you can redistribute it and/or 5*a47a12beSStefan Roese * modify it under the terms of the GNU General Public License as 6*a47a12beSStefan Roese * published by the Free Software Foundation; either version 2 of 7*a47a12beSStefan Roese * the License, or (at your option) any later version. 8*a47a12beSStefan Roese * 9*a47a12beSStefan Roese * This program is distributed in the hope that it will be useful, 10*a47a12beSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*a47a12beSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*a47a12beSStefan Roese * GNU General Public License for more details. 13*a47a12beSStefan Roese * 14*a47a12beSStefan Roese * You should have received a copy of the GNU General Public License 15*a47a12beSStefan Roese * along with this program; if not, write to the Free Software 16*a47a12beSStefan Roese * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 17*a47a12beSStefan Roese * MA 02111-1307 USA 18*a47a12beSStefan Roese */ 19*a47a12beSStefan Roese 20*a47a12beSStefan Roese #include <common.h> 21*a47a12beSStefan Roese #include <asm/processor.h> 22*a47a12beSStefan Roese #include <asm/mmu.h> 23*a47a12beSStefan Roese #include <asm/fsl_law.h> 24*a47a12beSStefan Roese 25*a47a12beSStefan Roese DECLARE_GLOBAL_DATA_PTR; 26*a47a12beSStefan Roese 27*a47a12beSStefan Roese #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS) 28*a47a12beSStefan Roese #ifdef CONFIG_FSL_CORENET 29*a47a12beSStefan Roese static void setup_ccsrbar(void) 30*a47a12beSStefan Roese { 31*a47a12beSStefan Roese u32 temp; 32*a47a12beSStefan Roese volatile u32 *ccsr_virt = (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000); 33*a47a12beSStefan Roese volatile ccsr_local_t *ccm; 34*a47a12beSStefan Roese 35*a47a12beSStefan Roese /* 36*a47a12beSStefan Roese * We can't call set_law() because we haven't moved 37*a47a12beSStefan Roese * CCSR yet. 38*a47a12beSStefan Roese */ 39*a47a12beSStefan Roese ccm = (void *)ccsr_virt; 40*a47a12beSStefan Roese 41*a47a12beSStefan Roese out_be32(&ccm->law[0].lawbarh, 42*a47a12beSStefan Roese (u64)CONFIG_SYS_CCSRBAR_PHYS >> 32); 43*a47a12beSStefan Roese out_be32(&ccm->law[0].lawbarl, (u32)CONFIG_SYS_CCSRBAR_PHYS); 44*a47a12beSStefan Roese out_be32(&ccm->law[0].lawar, 45*a47a12beSStefan Roese LAW_EN | (0x1e << 20) | LAW_SIZE_4K); 46*a47a12beSStefan Roese 47*a47a12beSStefan Roese in_be32((u32 *)(ccsr_virt + 0)); 48*a47a12beSStefan Roese in_be32((u32 *)(ccsr_virt + 1)); 49*a47a12beSStefan Roese isync(); 50*a47a12beSStefan Roese 51*a47a12beSStefan Roese ccm = (void *)CONFIG_SYS_CCSRBAR; 52*a47a12beSStefan Roese /* Now use the temporary LAW to move CCSR */ 53*a47a12beSStefan Roese out_be32(&ccm->ccsrbarh, (u64)CONFIG_SYS_CCSRBAR_PHYS >> 32); 54*a47a12beSStefan Roese out_be32(&ccm->ccsrbarl, (u32)CONFIG_SYS_CCSRBAR_PHYS); 55*a47a12beSStefan Roese out_be32(&ccm->ccsrar, CCSRAR_C); 56*a47a12beSStefan Roese temp = in_be32(&ccm->ccsrar); 57*a47a12beSStefan Roese disable_law(0); 58*a47a12beSStefan Roese } 59*a47a12beSStefan Roese #else 60*a47a12beSStefan Roese static void setup_ccsrbar(void) 61*a47a12beSStefan Roese { 62*a47a12beSStefan Roese u32 temp; 63*a47a12beSStefan Roese volatile u32 *ccsr_virt = (volatile u32 *)(CONFIG_SYS_CCSRBAR + 0x1000); 64*a47a12beSStefan Roese 65*a47a12beSStefan Roese temp = in_be32(ccsr_virt); 66*a47a12beSStefan Roese out_be32(ccsr_virt, CONFIG_SYS_CCSRBAR_PHYS >> 12); 67*a47a12beSStefan Roese temp = in_be32((volatile u32 *)CONFIG_SYS_CCSRBAR); 68*a47a12beSStefan Roese } 69*a47a12beSStefan Roese #endif 70*a47a12beSStefan Roese #endif 71*a47a12beSStefan Roese 72*a47a12beSStefan Roese /* We run cpu_init_early_f in AS = 1 */ 73*a47a12beSStefan Roese void cpu_init_early_f(void) 74*a47a12beSStefan Roese { 75*a47a12beSStefan Roese u32 mas0, mas1, mas2, mas3, mas7; 76*a47a12beSStefan Roese int i; 77*a47a12beSStefan Roese 78*a47a12beSStefan Roese /* Pointer is writable since we allocated a register for it */ 79*a47a12beSStefan Roese gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); 80*a47a12beSStefan Roese 81*a47a12beSStefan Roese /* 82*a47a12beSStefan Roese * Clear initial global data 83*a47a12beSStefan Roese * we don't use memset so we can share this code with NAND_SPL 84*a47a12beSStefan Roese */ 85*a47a12beSStefan Roese for (i = 0; i < sizeof(gd_t); i++) 86*a47a12beSStefan Roese ((char *)gd)[i] = 0; 87*a47a12beSStefan Roese 88*a47a12beSStefan Roese mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(0); 89*a47a12beSStefan Roese mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_4K); 90*a47a12beSStefan Roese mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, MAS2_I|MAS2_G); 91*a47a12beSStefan Roese mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS, 0, MAS3_SW|MAS3_SR); 92*a47a12beSStefan Roese mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_PHYS); 93*a47a12beSStefan Roese 94*a47a12beSStefan Roese write_tlb(mas0, mas1, mas2, mas3, mas7); 95*a47a12beSStefan Roese 96*a47a12beSStefan Roese /* set up CCSR if we want it moved */ 97*a47a12beSStefan Roese #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS) 98*a47a12beSStefan Roese mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(1); 99*a47a12beSStefan Roese /* mas1 is the same as above */ 100*a47a12beSStefan Roese mas2 = FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0x1000, MAS2_I|MAS2_G); 101*a47a12beSStefan Roese mas3 = FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, MAS3_SW|MAS3_SR); 102*a47a12beSStefan Roese mas7 = FSL_BOOKE_MAS7(CONFIG_SYS_CCSRBAR_DEFAULT); 103*a47a12beSStefan Roese 104*a47a12beSStefan Roese write_tlb(mas0, mas1, mas2, mas3, mas7); 105*a47a12beSStefan Roese 106*a47a12beSStefan Roese setup_ccsrbar(); 107*a47a12beSStefan Roese #endif 108*a47a12beSStefan Roese 109*a47a12beSStefan Roese init_laws(); 110*a47a12beSStefan Roese invalidate_tlb(0); 111*a47a12beSStefan Roese init_tlbs(); 112*a47a12beSStefan Roese } 113