1d2404141SYork Sun /*
2d2404141SYork Sun * Copyright 2012 Freescale Semiconductor, Inc.
3d2404141SYork Sun *
41a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
5d2404141SYork Sun */
6d2404141SYork Sun
7d2404141SYork Sun #include <common.h>
8d2404141SYork Sun #include <asm/fsl_serdes.h>
9d2404141SYork Sun #include <asm/processor.h>
10d2404141SYork Sun #include <asm/io.h>
11d2404141SYork Sun #include "fsl_corenet2_serdes.h"
12d2404141SYork Sun
13d2404141SYork Sun struct serdes_config {
14d2404141SYork Sun u8 protocol;
15d2404141SYork Sun u8 lanes[SRDS_MAX_LANES];
16d2404141SYork Sun };
17d2404141SYork Sun
183006ebc3SYork Sun #ifdef CONFIG_ARCH_B4860
19d2404141SYork Sun static struct serdes_config serdes1_cfg_tbl[] = {
20d2404141SYork Sun /* SerDes 1 */
21ffc1a87bSShaveta Leekha {0x01, {AURORA, AURORA, CPRI6, CPRI5,
22ffc1a87bSShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
235e5097c1SShaveta Leekha {0x02, {AURORA, AURORA, CPRI6, CPRI5,
245e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
255e5097c1SShaveta Leekha {0x04, {AURORA, AURORA, CPRI6, CPRI5,
265e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
275e5097c1SShaveta Leekha {0x05, {AURORA, AURORA, CPRI6, CPRI5,
285e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
295e5097c1SShaveta Leekha {0x06, {AURORA, AURORA, CPRI6, CPRI5,
305e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
31ffc1a87bSShaveta Leekha {0x07, {AURORA, AURORA, CPRI6, CPRI5,
32ffc1a87bSShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
335e5097c1SShaveta Leekha {0x08, {AURORA, AURORA, CPRI6, CPRI5,
345e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
355e5097c1SShaveta Leekha {0x09, {AURORA, AURORA, CPRI6, CPRI5,
365e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
375e5097c1SShaveta Leekha {0x0A, {AURORA, AURORA, CPRI6, CPRI5,
385e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
395e5097c1SShaveta Leekha {0x0B, {AURORA, AURORA, CPRI6, CPRI5,
405e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
415e5097c1SShaveta Leekha {0x0C, {AURORA, AURORA, CPRI6, CPRI5,
425e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
43d2404141SYork Sun {0x0D, {CPRI8, CPRI7, CPRI6, CPRI5,
44d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
45d2404141SYork Sun {0x0E, {CPRI8, CPRI7, CPRI6, CPRI5,
46d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
47d2404141SYork Sun {0x12, {CPRI8, CPRI7, CPRI6, CPRI5,
48d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
49c7d506d4Spoonam aggrwal {0x29, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
50c7d506d4Spoonam aggrwal CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1} },
51d2404141SYork Sun {0x2a, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
52d2404141SYork Sun CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
53e394ceb1SPoonam Aggrwal {0x2C, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
54e394ceb1SPoonam Aggrwal CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
55e394ceb1SPoonam Aggrwal {0x2D, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
56e394ceb1SPoonam Aggrwal CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
57e394ceb1SPoonam Aggrwal {0x2E, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6,
58e394ceb1SPoonam Aggrwal CPRI6, CPRI5, CPRI4, CPRI3, CPRI2, CPRI1}},
59c7d506d4Spoonam aggrwal {0x2F, {AURORA, AURORA,
60c7d506d4Spoonam aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
61c7d506d4Spoonam aggrwal CPRI4, CPRI3, CPRI2, CPRI1} },
62d2404141SYork Sun {0x30, {AURORA, AURORA,
63d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
64d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
65d2404141SYork Sun {0x32, {AURORA, AURORA,
66d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
67d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
68d2404141SYork Sun {0x33, {AURORA, AURORA,
69d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
70d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
71d2404141SYork Sun {0x34, {AURORA, AURORA,
72d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
73d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
745e5097c1SShaveta Leekha {0x39, {AURORA, AURORA, CPRI6, CPRI5,
755e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
765e5097c1SShaveta Leekha {0x3A, {AURORA, AURORA, CPRI6, CPRI5,
775e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
785e5097c1SShaveta Leekha {0x3C, {AURORA, AURORA, CPRI6, CPRI5,
795e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
805e5097c1SShaveta Leekha {0x3D, {AURORA, AURORA, CPRI6, CPRI5,
815e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
82d2404141SYork Sun {0x3E, {CPRI8, CPRI7, CPRI6, CPRI5,
83d2404141SYork Sun CPRI4, CPRI3, CPRI2, CPRI1}},
845e5097c1SShaveta Leekha {0x5C, {AURORA, AURORA,
855e5097c1SShaveta Leekha SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
865e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
875e5097c1SShaveta Leekha {0x5D, {AURORA, AURORA,
885e5097c1SShaveta Leekha SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
895e5097c1SShaveta Leekha CPRI4, CPRI3, CPRI2, CPRI1} },
90d2404141SYork Sun {}
91d2404141SYork Sun };
92d2404141SYork Sun static struct serdes_config serdes2_cfg_tbl[] = {
93d2404141SYork Sun /* SerDes 2 */
94c7d506d4Spoonam aggrwal {0x17, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
95c7d506d4Spoonam aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
96c7d506d4Spoonam aggrwal AURORA, AURORA, SRIO1, SRIO1} },
97d2404141SYork Sun {0x18, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
98d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
99d2404141SYork Sun AURORA, AURORA, SRIO1, SRIO1}},
100d2404141SYork Sun {0x1D, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
101d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
102d2404141SYork Sun AURORA, AURORA, SRIO1, SRIO1}},
103c7d506d4Spoonam aggrwal {0x2A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
104c7d506d4Spoonam aggrwal SRIO2, SRIO2,
105c7d506d4Spoonam aggrwal AURORA, AURORA, SRIO1, SRIO1} },
106d2404141SYork Sun {0x2B, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
107d2404141SYork Sun SRIO2, SRIO2,
108d2404141SYork Sun AURORA, AURORA, SRIO1, SRIO1}},
109d2404141SYork Sun {0x30, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
110d2404141SYork Sun SRIO2, SRIO2,
111d2404141SYork Sun AURORA, AURORA,
112d2404141SYork Sun SRIO1, SRIO1}},
113c7d506d4Spoonam aggrwal {0x48, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
114c7d506d4Spoonam aggrwal SGMII_FM1_DTSEC3, AURORA,
115c7d506d4Spoonam aggrwal SRIO1, SRIO1, SRIO1, SRIO1} },
116d2404141SYork Sun {0x49, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
117d2404141SYork Sun SGMII_FM1_DTSEC3, AURORA,
118d2404141SYork Sun SRIO1, SRIO1, SRIO1, SRIO1}},
119d2404141SYork Sun {0x4A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
120d2404141SYork Sun SGMII_FM1_DTSEC3, AURORA,
121d2404141SYork Sun SRIO1, SRIO1, SRIO1, SRIO1}},
122d2404141SYork Sun {0x4C, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
123d2404141SYork Sun SGMII_FM1_DTSEC3, AURORA,
124d2404141SYork Sun SRIO1, SRIO1, SRIO1, SRIO1}},
125d2404141SYork Sun {0x4E, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
126d2404141SYork Sun SGMII_FM1_DTSEC3, AURORA,
127d2404141SYork Sun SRIO1, SRIO1, SRIO1, SRIO1}},
128c7d506d4Spoonam aggrwal {0x79, {SRIO2, SRIO2, SRIO2, SRIO2,
129c7d506d4Spoonam aggrwal SRIO1, SRIO1, SRIO1, SRIO1} },
130e394ceb1SPoonam Aggrwal {0x7A, {SRIO2, SRIO2, SRIO2, SRIO2,
131e394ceb1SPoonam Aggrwal SRIO1, SRIO1, SRIO1, SRIO1}},
132c7d506d4Spoonam aggrwal {0x83, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
133c7d506d4Spoonam aggrwal SRIO2, SRIO2, AURORA, AURORA,
134c7d506d4Spoonam aggrwal XFI_FM1_MAC9, XFI_FM1_MAC10} },
135d2404141SYork Sun {0x84, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
136d2404141SYork Sun SRIO2, SRIO2, AURORA, AURORA,
137d2404141SYork Sun XFI_FM1_MAC9, XFI_FM1_MAC10}},
138d2404141SYork Sun {0x85, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
139d2404141SYork Sun SRIO2, SRIO2, AURORA, AURORA,
140d2404141SYork Sun XFI_FM1_MAC9, XFI_FM1_MAC10}},
141c7d506d4Spoonam aggrwal {0x86, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
142c7d506d4Spoonam aggrwal SRIO2, SRIO2,
143c7d506d4Spoonam aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
144c7d506d4Spoonam aggrwal XFI_FM1_MAC9, XFI_FM1_MAC10} },
145d2404141SYork Sun {0x87, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
146d2404141SYork Sun SRIO2, SRIO2,
147d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
148d2404141SYork Sun XFI_FM1_MAC9, XFI_FM1_MAC10}},
149c7d506d4Spoonam aggrwal {0x8C, {SRIO2, SRIO2, SRIO2, SRIO2,
150c7d506d4Spoonam aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
151c7d506d4Spoonam aggrwal XFI_FM1_MAC9, XFI_FM1_MAC10} },
152e394ceb1SPoonam Aggrwal {0x8D, {SRIO2, SRIO2, SRIO2, SRIO2,
153e394ceb1SPoonam Aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
154e394ceb1SPoonam Aggrwal XFI_FM1_MAC9, XFI_FM1_MAC10}},
155d2404141SYork Sun {0x93, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
156d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
157d2404141SYork Sun XAUI_FM1_MAC10, XAUI_FM1_MAC10,
158d2404141SYork Sun XAUI_FM1_MAC10, XAUI_FM1_MAC10}},
159d2404141SYork Sun {0x9E, {PCIE1, PCIE1, PCIE1, PCIE1,
160d2404141SYork Sun XAUI_FM1_MAC10, XAUI_FM1_MAC10,
161d2404141SYork Sun XAUI_FM1_MAC10, XAUI_FM1_MAC10}},
162d2404141SYork Sun {0x9A, {PCIE1, PCIE1,
163d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
164d2404141SYork Sun XAUI_FM1_MAC10, XAUI_FM1_MAC10,
165d2404141SYork Sun XAUI_FM1_MAC10, XAUI_FM1_MAC10}},
166c7d506d4Spoonam aggrwal {0xB1, {PCIE1, PCIE1, PCIE1, PCIE1,
167c7d506d4Spoonam aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
168c7d506d4Spoonam aggrwal XFI_FM1_MAC9, XFI_FM1_MAC10} },
169d2404141SYork Sun {0xB2, {PCIE1, PCIE1, PCIE1, PCIE1,
170d2404141SYork Sun SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
171d2404141SYork Sun XFI_FM1_MAC9, XFI_FM1_MAC10}},
172d2404141SYork Sun {0xC3, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
173d2404141SYork Sun XAUI_FM1_MAC9, XAUI_FM1_MAC9,
174d2404141SYork Sun SRIO1, SRIO1, SRIO1, SRIO1}},
175e394ceb1SPoonam Aggrwal {0x98, {XAUI_FM1_MAC9, XAUI_FM1_MAC9,
176e394ceb1SPoonam Aggrwal XAUI_FM1_MAC9, XAUI_FM1_MAC9,
177e394ceb1SPoonam Aggrwal XAUI_FM1_MAC10, XAUI_FM1_MAC10,
178e394ceb1SPoonam Aggrwal XAUI_FM1_MAC10, XAUI_FM1_MAC10}},
179d2404141SYork Sun {}
180d2404141SYork Sun };
181e1dbdd81SPoonam Aggrwal #endif
182e1dbdd81SPoonam Aggrwal
183*b41f192bSYork Sun #ifdef CONFIG_ARCH_B4420
184e1dbdd81SPoonam Aggrwal static struct serdes_config serdes1_cfg_tbl[] = {
185e1dbdd81SPoonam Aggrwal {0x0D, {NONE, NONE, CPRI6, CPRI5,
186e1dbdd81SPoonam Aggrwal CPRI4, CPRI3, NONE, NONE} },
187e1dbdd81SPoonam Aggrwal {0x0E, {NONE, NONE, CPRI8, CPRI5,
188e1dbdd81SPoonam Aggrwal CPRI4, CPRI3, NONE, NONE} },
189e1dbdd81SPoonam Aggrwal {0x0F, {NONE, NONE, CPRI6, CPRI5,
190e1dbdd81SPoonam Aggrwal CPRI4, CPRI3, NONE, NONE} },
191ffc1a87bSShaveta Leekha {0x17, {NONE, NONE,
192ffc1a87bSShaveta Leekha SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
193ffc1a87bSShaveta Leekha NONE, NONE, NONE, NONE} },
194e1dbdd81SPoonam Aggrwal {0x18, {NONE, NONE,
195e1dbdd81SPoonam Aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
196e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
197e1dbdd81SPoonam Aggrwal {0x1B, {NONE, NONE,
198e1dbdd81SPoonam Aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
199e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
200ffc1a87bSShaveta Leekha {0x1D, {NONE, NONE, AURORA, AURORA,
201ffc1a87bSShaveta Leekha NONE, NONE, NONE, NONE} },
202e1dbdd81SPoonam Aggrwal {0x1E, {NONE, NONE, AURORA, AURORA,
203e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
204e1dbdd81SPoonam Aggrwal {0x21, {NONE, NONE, AURORA, AURORA,
205e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
206e1dbdd81SPoonam Aggrwal {0x3E, {NONE, NONE, CPRI6, CPRI5,
207e1dbdd81SPoonam Aggrwal CPRI4, CPRI3, NONE, NONE} },
208e1dbdd81SPoonam Aggrwal {}
209e1dbdd81SPoonam Aggrwal };
210e1dbdd81SPoonam Aggrwal static struct serdes_config serdes2_cfg_tbl[] = {
211ffc1a87bSShaveta Leekha {0x48, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
212ffc1a87bSShaveta Leekha SGMII_FM1_DTSEC3, AURORA,
213ffc1a87bSShaveta Leekha NONE, NONE, NONE, NONE} },
214e1dbdd81SPoonam Aggrwal {0x49, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
215e1dbdd81SPoonam Aggrwal SGMII_FM1_DTSEC3, AURORA,
216e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
217e1dbdd81SPoonam Aggrwal {0x4A, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
218e1dbdd81SPoonam Aggrwal SGMII_FM1_DTSEC3, AURORA,
219e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
220ffc1a87bSShaveta Leekha {0x6E, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
221ffc1a87bSShaveta Leekha AURORA, AURORA, NONE, NONE, NONE, NONE} },
222e1dbdd81SPoonam Aggrwal {0x6F, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
223e1dbdd81SPoonam Aggrwal AURORA, AURORA, NONE, NONE, NONE, NONE} },
224e1dbdd81SPoonam Aggrwal {0x70, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2,
225e1dbdd81SPoonam Aggrwal AURORA, AURORA, NONE, NONE, NONE, NONE} },
226ffc1a87bSShaveta Leekha {0x99, {PCIE1, PCIE1,
227ffc1a87bSShaveta Leekha SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
228ffc1a87bSShaveta Leekha NONE, NONE, NONE, NONE} },
229e1dbdd81SPoonam Aggrwal {0x9A, {PCIE1, PCIE1,
230e1dbdd81SPoonam Aggrwal SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4,
231e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
232ffc1a87bSShaveta Leekha {0x9D, {PCIE1, PCIE1, PCIE1, PCIE1,
233ffc1a87bSShaveta Leekha NONE, NONE, NONE, NONE} },
234e1dbdd81SPoonam Aggrwal {0x9E, {PCIE1, PCIE1, PCIE1, PCIE1,
235e1dbdd81SPoonam Aggrwal NONE, NONE, NONE, NONE} },
236e1dbdd81SPoonam Aggrwal {}
237e1dbdd81SPoonam Aggrwal };
238e1dbdd81SPoonam Aggrwal #endif
239e1dbdd81SPoonam Aggrwal
240d2404141SYork Sun static struct serdes_config *serdes_cfg_tbl[] = {
241d2404141SYork Sun serdes1_cfg_tbl,
242d2404141SYork Sun serdes2_cfg_tbl,
243d2404141SYork Sun };
244d2404141SYork Sun
serdes_get_prtcl(int serdes,int cfg,int lane)245d2404141SYork Sun enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
246d2404141SYork Sun {
247d2404141SYork Sun struct serdes_config *ptr;
248d2404141SYork Sun
249d2404141SYork Sun if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
250d2404141SYork Sun return 0;
251d2404141SYork Sun
252d2404141SYork Sun ptr = serdes_cfg_tbl[serdes];
253d2404141SYork Sun while (ptr->protocol) {
254d2404141SYork Sun if (ptr->protocol == cfg)
255d2404141SYork Sun return ptr->lanes[lane];
256d2404141SYork Sun ptr++;
257d2404141SYork Sun }
258d2404141SYork Sun
259d2404141SYork Sun return 0;
260d2404141SYork Sun }
261d2404141SYork Sun
is_serdes_prtcl_valid(int serdes,u32 prtcl)262d2404141SYork Sun int is_serdes_prtcl_valid(int serdes, u32 prtcl)
263d2404141SYork Sun {
264d2404141SYork Sun int i;
265d2404141SYork Sun struct serdes_config *ptr;
266d2404141SYork Sun
267d2404141SYork Sun if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
268d2404141SYork Sun return 0;
269d2404141SYork Sun
270d2404141SYork Sun ptr = serdes_cfg_tbl[serdes];
271d2404141SYork Sun while (ptr->protocol) {
272d2404141SYork Sun if (ptr->protocol == prtcl)
273d2404141SYork Sun break;
274d2404141SYork Sun ptr++;
275d2404141SYork Sun }
276d2404141SYork Sun
277d2404141SYork Sun if (!ptr->protocol)
278d2404141SYork Sun return 0;
279d2404141SYork Sun
280d2404141SYork Sun for (i = 0; i < SRDS_MAX_LANES; i++) {
281d2404141SYork Sun if (ptr->lanes[i] != NONE)
282d2404141SYork Sun return 1;
283d2404141SYork Sun }
284d2404141SYork Sun
285d2404141SYork Sun return 0;
286d2404141SYork Sun }
287