xref: /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/qe_io.c (revision 1221ce459d04a428f8880f58581f671b736c3c27)
1a47a12beSStefan Roese /*
2a47a12beSStefan Roese  * Copyright (C) 2006 Freescale Semiconductor, Inc.
3a47a12beSStefan Roese  *
4a47a12beSStefan Roese  * Dave Liu <daveliu@freescale.com>
5a47a12beSStefan Roese  * based on source code of Shlomi Gridish
6a47a12beSStefan Roese  *
71a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
8a47a12beSStefan Roese  */
9a47a12beSStefan Roese 
10b5bf5cb3SMasahiro Yamada #include <common.h>
11*1221ce45SMasahiro Yamada #include <linux/errno.h>
12b5bf5cb3SMasahiro Yamada #include <asm/io.h>
13b5bf5cb3SMasahiro Yamada #include <asm/immap_83xx.h>
14a47a12beSStefan Roese 
15a47a12beSStefan Roese #define	NUM_OF_PINS	32
qe_config_iopin(u8 port,u8 pin,int dir,int open_drain,int assign)16a47a12beSStefan Roese void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
17a47a12beSStefan Roese {
18a47a12beSStefan Roese 	u32			pin_2bit_mask;
19a47a12beSStefan Roese 	u32			pin_2bit_dir;
20a47a12beSStefan Roese 	u32			pin_2bit_assign;
21a47a12beSStefan Roese 	u32			pin_1bit_mask;
22a47a12beSStefan Roese 	u32			tmp_val;
23a47a12beSStefan Roese 	volatile immap_t	*im = (volatile immap_t *)CONFIG_SYS_IMMR;
24a47a12beSStefan Roese 	volatile qepio83xx_t	*par_io = (volatile qepio83xx_t *)&im->qepio;
25a47a12beSStefan Roese 
26d7b4ca2bSRobert P. J. Day 	/* Calculate pin location and 2bit mask and dir */
27a47a12beSStefan Roese 	pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
28a47a12beSStefan Roese 	pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
29a47a12beSStefan Roese 
30a47a12beSStefan Roese 	/* Setup the direction */
31a47a12beSStefan Roese 	tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \
32a47a12beSStefan Roese 		in_be32(&par_io->ioport[port].dir2) :
33a47a12beSStefan Roese 		in_be32(&par_io->ioport[port].dir1);
34a47a12beSStefan Roese 
35a47a12beSStefan Roese 	if (pin > (NUM_OF_PINS/2) -1) {
36a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].dir2, ~pin_2bit_mask & tmp_val);
37a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].dir2, pin_2bit_dir | tmp_val);
38a47a12beSStefan Roese 	} else {
39a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].dir1, ~pin_2bit_mask & tmp_val);
40a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].dir1, pin_2bit_dir | tmp_val);
41a47a12beSStefan Roese 	}
42a47a12beSStefan Roese 
43a47a12beSStefan Roese 	/* Calculate pin location for 1bit mask */
44a47a12beSStefan Roese 	pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1)));
45a47a12beSStefan Roese 
46a47a12beSStefan Roese 	/* Setup the open drain */
47a47a12beSStefan Roese 	tmp_val = in_be32(&par_io->ioport[port].podr);
48a47a12beSStefan Roese 	if (open_drain) {
49a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].podr, pin_1bit_mask | tmp_val);
50a47a12beSStefan Roese 	} else {
51a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].podr, ~pin_1bit_mask & tmp_val);
52a47a12beSStefan Roese 	}
53a47a12beSStefan Roese 
54a47a12beSStefan Roese 	/* Setup the assignment */
55a47a12beSStefan Roese 	tmp_val = (pin > (NUM_OF_PINS/2) - 1) ?
56a47a12beSStefan Roese 		in_be32(&par_io->ioport[port].ppar2):
57a47a12beSStefan Roese 		in_be32(&par_io->ioport[port].ppar1);
58a47a12beSStefan Roese 	pin_2bit_assign = (u32)(assign
59a47a12beSStefan Roese 				<< (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2));
60a47a12beSStefan Roese 
61a47a12beSStefan Roese 	/* Clear and set 2 bits mask */
62a47a12beSStefan Roese 	if (pin > (NUM_OF_PINS/2) - 1) {
63a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].ppar2, ~pin_2bit_mask & tmp_val);
64a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].ppar2, pin_2bit_assign | tmp_val);
65a47a12beSStefan Roese 	} else {
66a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].ppar1, ~pin_2bit_mask & tmp_val);
67a47a12beSStefan Roese 		out_be32(&par_io->ioport[port].ppar1, pin_2bit_assign | tmp_val);
68a47a12beSStefan Roese 	}
69a47a12beSStefan Roese }
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