17e812f2eSThomas Chou #ifndef __ASM_NIOS2_DMA_MAPPING_H 27e812f2eSThomas Chou #define __ASM_NIOS2_DMA_MAPPING_H 37e812f2eSThomas Chou 4*7cacb64aSThomas Chou #include <memalign.h> 5*7cacb64aSThomas Chou #include <asm/io.h> 67e812f2eSThomas Chou 7*7cacb64aSThomas Chou /* 8*7cacb64aSThomas Chou * dma_alloc_coherent() return cache-line aligned allocation which is mapped 9*7cacb64aSThomas Chou * to uncached io region. 10*7cacb64aSThomas Chou */ 117e812f2eSThomas Chou static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) 127e812f2eSThomas Chou { 13*7cacb64aSThomas Chou unsigned long addr = (unsigned long)malloc_cache_aligned(len); 147e812f2eSThomas Chou 15*7cacb64aSThomas Chou if (!addr) 16*7cacb64aSThomas Chou return NULL; 17*7cacb64aSThomas Chou 18*7cacb64aSThomas Chou invalidate_dcache_range(addr, addr + len); 19*7cacb64aSThomas Chou if (handle) 20*7cacb64aSThomas Chou *handle = addr; 21*7cacb64aSThomas Chou 22*7cacb64aSThomas Chou return ioremap(addr, len); 23*7cacb64aSThomas Chou } 247e812f2eSThomas Chou #endif /* __ASM_NIOS2_DMA_MAPPING_H */ 25