17e812f2eSThomas Chou #ifndef __ASM_NIOS2_DMA_MAPPING_H 27e812f2eSThomas Chou #define __ASM_NIOS2_DMA_MAPPING_H 37e812f2eSThomas Chou 47cacb64aSThomas Chou #include <memalign.h> 57cacb64aSThomas Chou #include <asm/io.h> 67e812f2eSThomas Chou 77cacb64aSThomas Chou /* 87cacb64aSThomas Chou * dma_alloc_coherent() return cache-line aligned allocation which is mapped 97cacb64aSThomas Chou * to uncached io region. 107cacb64aSThomas Chou */ dma_alloc_coherent(size_t len,unsigned long * handle)117e812f2eSThomas Choustatic inline void *dma_alloc_coherent(size_t len, unsigned long *handle) 127e812f2eSThomas Chou { 137cacb64aSThomas Chou unsigned long addr = (unsigned long)malloc_cache_aligned(len); 147e812f2eSThomas Chou 157cacb64aSThomas Chou if (!addr) 167cacb64aSThomas Chou return NULL; 177cacb64aSThomas Chou 187cacb64aSThomas Chou invalidate_dcache_range(addr, addr + len); 197cacb64aSThomas Chou if (handle) 207cacb64aSThomas Chou *handle = addr; 217cacb64aSThomas Chou 22*7be35dddSThomas Chou return map_physmem(addr, len, MAP_NOCACHE); 237cacb64aSThomas Chou } 247e812f2eSThomas Chou #endif /* __ASM_NIOS2_DMA_MAPPING_H */ 25