1819833afSPeter Tyser /* 2819833afSPeter Tyser * (C) Copyright 2004, Psyent Corporation <www.psyent.com> 3819833afSPeter Tyser * Scott McNutt <smcnutt@psyent.com> 4819833afSPeter Tyser * 5819833afSPeter Tyser * See file CREDITS for list of people who contributed to this 6819833afSPeter Tyser * project. 7819833afSPeter Tyser * 8819833afSPeter Tyser * This program is free software; you can redistribute it and/or 9819833afSPeter Tyser * modify it under the terms of the GNU General Public License as 10819833afSPeter Tyser * published by the Free Software Foundation; either version 2 of 11819833afSPeter Tyser * the License, or (at your option) any later version. 12819833afSPeter Tyser * 13819833afSPeter Tyser * This program is distributed in the hope that it will be useful, 14819833afSPeter Tyser * but WITHOUT ANY WARRANTY; without even the implied warranty of 15819833afSPeter Tyser * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16819833afSPeter Tyser * GNU General Public License for more details. 17819833afSPeter Tyser * 18819833afSPeter Tyser * You should have received a copy of the GNU General Public License 19819833afSPeter Tyser * along with this program; if not, write to the Free Software 20819833afSPeter Tyser * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21819833afSPeter Tyser * MA 02111-1307 USA 22819833afSPeter Tyser */ 23819833afSPeter Tyser 24819833afSPeter Tyser #ifndef __ASM_NIOS2_CACHE_H_ 25819833afSPeter Tyser #define __ASM_NIOS2_CACHE_H_ 26819833afSPeter Tyser 27819833afSPeter Tyser extern void flush_dcache (unsigned long start, unsigned long size); 28819833afSPeter Tyser extern void flush_icache (unsigned long start, unsigned long size); 29819833afSPeter Tyser 30*6fa6035fSAnton Staaf /* 31*6fa6035fSAnton Staaf * Valid L1 data cache line sizes for the NIOS2 architecture are 4, 16, and 32 32*6fa6035fSAnton Staaf * bytes. If the board configuration has not specified one we default to the 33*6fa6035fSAnton Staaf * largest of these values for alignment of DMA buffers. 34*6fa6035fSAnton Staaf */ 35*6fa6035fSAnton Staaf #ifdef CONFIG_SYS_CACHELINE_SIZE 36*6fa6035fSAnton Staaf #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE 37*6fa6035fSAnton Staaf #else 38*6fa6035fSAnton Staaf #define ARCH_DMA_MINALIGN 32 39*6fa6035fSAnton Staaf #endif 40*6fa6035fSAnton Staaf 41819833afSPeter Tyser #endif /* __ASM_NIOS2_CACHE_H_ */ 42