xref: /rk3399_rockchip-uboot/arch/nios2/cpu/cpu.c (revision 21ff7344d116df7f6963f1a699ed4b175d8485d7)
1 /*
2  * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3  * Scott McNutt <smcnutt@psyent.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <cpu.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <asm/cache.h>
13 
14 DECLARE_GLOBAL_DATA_PTR;
15 
16 #ifdef CONFIG_DISPLAY_CPUINFO
17 int print_cpuinfo(void)
18 {
19 	printf("CPU:   Nios-II\n");
20 	return 0;
21 }
22 #endif /* CONFIG_DISPLAY_CPUINFO */
23 
24 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
25 {
26 	disable_interrupts();
27 	/* indirect call to go beyond 256MB limitation of toolchain */
28 	nios2_callr(gd->arch.reset_addr);
29 	return 0;
30 }
31 
32 int arch_cpu_init_dm(void)
33 {
34 	struct udevice *dev;
35 	int ret;
36 
37 	ret = uclass_first_device(UCLASS_CPU, &dev);
38 	if (ret)
39 		return ret;
40 	if (!dev)
41 		return -ENODEV;
42 
43 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
44 
45 	return 0;
46 }
47 
48 static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size)
49 {
50 	const char *cpu_name = "Nios-II";
51 
52 	if (size < strlen(cpu_name))
53 		return -ENOSPC;
54 	strcpy(buf, cpu_name);
55 
56 	return 0;
57 }
58 
59 static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info)
60 {
61 	info->cpu_freq = gd->cpu_clk;
62 	info->features = (1 << CPU_FEAT_L1_CACHE) |
63 		(gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
64 
65 	return 0;
66 }
67 
68 static int altera_nios2_get_count(struct udevice *dev)
69 {
70 	return 1;
71 }
72 
73 static int altera_nios2_probe(struct udevice *dev)
74 {
75 	const void *blob = gd->fdt_blob;
76 	int node = dev->of_offset;
77 
78 	gd->cpu_clk = fdtdec_get_int(blob, node,
79 		"clock-frequency", 0);
80 	gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
81 		"dcache-line-size", 0);
82 	gd->arch.icache_line_size = fdtdec_get_int(blob, node,
83 		"icache-line-size", 0);
84 	gd->arch.dcache_size = fdtdec_get_int(blob, node,
85 		"dcache-size", 0);
86 	gd->arch.icache_size = fdtdec_get_int(blob, node,
87 		"icache-size", 0);
88 	gd->arch.reset_addr = fdtdec_get_int(blob, node,
89 		"altr,reset-addr", 0);
90 	gd->arch.exception_addr = fdtdec_get_int(blob, node,
91 		"altr,exception-addr", 0);
92 	gd->arch.has_initda = fdtdec_get_int(blob, node,
93 		"altr,has-initda", 0);
94 	gd->arch.has_mmu = fdtdec_get_int(blob, node,
95 		"altr,has-mmu", 0);
96 	gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x8000000;
97 
98 	return 0;
99 }
100 
101 static const struct cpu_ops altera_nios2_ops = {
102 	.get_desc	= altera_nios2_get_desc,
103 	.get_info	= altera_nios2_get_info,
104 	.get_count	= altera_nios2_get_count,
105 };
106 
107 static const struct udevice_id altera_nios2_ids[] = {
108 	{ .compatible = "altr,nios2-1.0" },
109 	{ .compatible = "altr,nios2-1.1" },
110 	{ }
111 };
112 
113 U_BOOT_DRIVER(altera_nios2) = {
114 	.name		= "altera_nios2",
115 	.id		= UCLASS_CPU,
116 	.of_match	= altera_nios2_ids,
117 	.probe		= altera_nios2_probe,
118 	.ops		= &altera_nios2_ops,
119 	.flags		= DM_FLAG_PRE_RELOC,
120 };
121