1*00f892fcSMacpaul Lin /* 2*00f892fcSMacpaul Lin * include/asm-nds32/macro.h 3*00f892fcSMacpaul Lin * 4*00f892fcSMacpaul Lin * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5*00f892fcSMacpaul Lin * Copyright (C) 2011 Andes Technology Corporation 6*00f892fcSMacpaul Lin * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 7*00f892fcSMacpaul Lin * 8*00f892fcSMacpaul Lin * See file CREDITS for list of people who contributed to this 9*00f892fcSMacpaul Lin * project. 10*00f892fcSMacpaul Lin * 11*00f892fcSMacpaul Lin * This program is free software; you can redistribute it and/or 12*00f892fcSMacpaul Lin * modify it under the terms of the GNU General Public License as 13*00f892fcSMacpaul Lin * published by the Free Software Foundation; either version 2 of 14*00f892fcSMacpaul Lin * the License, or (at your option) any later version. 15*00f892fcSMacpaul Lin * 16*00f892fcSMacpaul Lin * This program is distributed in the hope that it will be useful, 17*00f892fcSMacpaul Lin * but WITHOUT ANY WARRANTY; without even the implied warranty of 18*00f892fcSMacpaul Lin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19*00f892fcSMacpaul Lin * GNU General Public License for more details. 20*00f892fcSMacpaul Lin * 21*00f892fcSMacpaul Lin * You should have received a copy of the GNU General Public License 22*00f892fcSMacpaul Lin * along with this program; if not, write to the Free Software 23*00f892fcSMacpaul Lin * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24*00f892fcSMacpaul Lin * MA 02111-1307 USA 25*00f892fcSMacpaul Lin */ 26*00f892fcSMacpaul Lin 27*00f892fcSMacpaul Lin #ifndef __ASM_NDS_MACRO_H 28*00f892fcSMacpaul Lin #define __ASM_NDS_MACRO_H 29*00f892fcSMacpaul Lin #ifdef __ASSEMBLY__ 30*00f892fcSMacpaul Lin 31*00f892fcSMacpaul Lin /* 32*00f892fcSMacpaul Lin * These macros provide a convenient way to write 8, 16 and 32 bit data 33*00f892fcSMacpaul Lin * to an "immediate address (address used by periphal)" only. 34*00f892fcSMacpaul Lin * Registers r4 and r5 are used, any data in these registers are 35*00f892fcSMacpaul Lin * overwritten by the macros. 36*00f892fcSMacpaul Lin * The macros are valid for any NDS32 architecture, they do not implement 37*00f892fcSMacpaul Lin * any memory barriers so caution is recommended when using these when the 38*00f892fcSMacpaul Lin * caches are enabled or on a multi-core system. 39*00f892fcSMacpaul Lin */ 40*00f892fcSMacpaul Lin 41*00f892fcSMacpaul Lin .macro write32, addr, data 42*00f892fcSMacpaul Lin li $r4, addr 43*00f892fcSMacpaul Lin li $r5, data 44*00f892fcSMacpaul Lin swi $r5, [$r4] 45*00f892fcSMacpaul Lin .endm 46*00f892fcSMacpaul Lin 47*00f892fcSMacpaul Lin .macro write16, addr, data 48*00f892fcSMacpaul Lin li $r4, addr 49*00f892fcSMacpaul Lin li $r5, data 50*00f892fcSMacpaul Lin shi $r5, [$r4] 51*00f892fcSMacpaul Lin .endm 52*00f892fcSMacpaul Lin 53*00f892fcSMacpaul Lin .macro write8, addr, data 54*00f892fcSMacpaul Lin li $r4, addr 55*00f892fcSMacpaul Lin li $r5, data 56*00f892fcSMacpaul Lin sbi $r5, [$r4] 57*00f892fcSMacpaul Lin .endm 58*00f892fcSMacpaul Lin 59*00f892fcSMacpaul Lin /* 60*00f892fcSMacpaul Lin * This macro read a value from a register, then do OR operation 61*00f892fcSMacpaul Lin * (set bit fields) to the value, and then store it back to the register. 62*00f892fcSMacpaul Lin * Note: Instruction 'ori' supports immediate value up to 15 bits. 63*00f892fcSMacpaul Lin */ 64*00f892fcSMacpaul Lin .macro setbf32, addr, data 65*00f892fcSMacpaul Lin li $r4, addr 66*00f892fcSMacpaul Lin lwi $r5, [$r4] 67*00f892fcSMacpaul Lin li $r6, data 68*00f892fcSMacpaul Lin or $r5, $r5, $r6 69*00f892fcSMacpaul Lin swi $r5, [$r4] 70*00f892fcSMacpaul Lin .endm 71*00f892fcSMacpaul Lin 72*00f892fcSMacpaul Lin .macro setbf15, addr, data 73*00f892fcSMacpaul Lin li $r4, addr 74*00f892fcSMacpaul Lin lwi $r5, [$r4] 75*00f892fcSMacpaul Lin ori $r5, $r5, data 76*00f892fcSMacpaul Lin swi $r5, [$r4] 77*00f892fcSMacpaul Lin .endm 78*00f892fcSMacpaul Lin 79*00f892fcSMacpaul Lin /* 80*00f892fcSMacpaul Lin * This macro generates a loop that can be used for delays in the code. 81*00f892fcSMacpaul Lin * Register r4 is used, any data in this register is overwritten by the 82*00f892fcSMacpaul Lin * macro. 83*00f892fcSMacpaul Lin * The macro is valid for any NDS32 architeture. The actual time spent in the 84*00f892fcSMacpaul Lin * loop will vary from CPU to CPU though. 85*00f892fcSMacpaul Lin */ 86*00f892fcSMacpaul Lin 87*00f892fcSMacpaul Lin .macro wait_timer, time 88*00f892fcSMacpaul Lin li $r4, time 89*00f892fcSMacpaul Lin 1: 90*00f892fcSMacpaul Lin nop 91*00f892fcSMacpaul Lin addi $r4, $r4, -1 92*00f892fcSMacpaul Lin bnez $r4, 1b 93*00f892fcSMacpaul Lin .endm 94*00f892fcSMacpaul Lin 95*00f892fcSMacpaul Lin #endif /* __ASSEMBLY__ */ 96*00f892fcSMacpaul Lin #endif /* __ASM_ARM_MACRO_H */ 97