1*00f892fcSMacpaul Lin /* 2*00f892fcSMacpaul Lin * Copyright (C) 2011 Andes Technology Corporation 3*00f892fcSMacpaul Lin * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 4*00f892fcSMacpaul Lin * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 5*00f892fcSMacpaul Lin * 6*00f892fcSMacpaul Lin * See file CREDITS for list of people who contributed to this 7*00f892fcSMacpaul Lin * project. 8*00f892fcSMacpaul Lin * 9*00f892fcSMacpaul Lin * This program is free software; you can redistribute it and/or 10*00f892fcSMacpaul Lin * modify it under the terms of the GNU General Public License as 11*00f892fcSMacpaul Lin * published by the Free Software Foundation; either version 2 of 12*00f892fcSMacpaul Lin * the License, or (at your option) any later version. 13*00f892fcSMacpaul Lin * 14*00f892fcSMacpaul Lin * This program is distributed in the hope that it will be useful, 15*00f892fcSMacpaul Lin * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*00f892fcSMacpaul Lin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*00f892fcSMacpaul Lin * GNU General Public License for more details. 18*00f892fcSMacpaul Lin * 19*00f892fcSMacpaul Lin * You should have received a copy of the GNU General Public License 20*00f892fcSMacpaul Lin * along with this program; if not, write to the Free Software 21*00f892fcSMacpaul Lin * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22*00f892fcSMacpaul Lin * MA 02111-1307 USA 23*00f892fcSMacpaul Lin */ 24*00f892fcSMacpaul Lin 25*00f892fcSMacpaul Lin #ifndef _ASM_CACHE_H 26*00f892fcSMacpaul Lin #define _ASM_CACHE_H 27*00f892fcSMacpaul Lin 28*00f892fcSMacpaul Lin /* cache */ 29*00f892fcSMacpaul Lin int icache_status(void); 30*00f892fcSMacpaul Lin void icache_enable(void); 31*00f892fcSMacpaul Lin void icache_disable(void); 32*00f892fcSMacpaul Lin int dcache_status(void); 33*00f892fcSMacpaul Lin void dcache_enable(void); 34*00f892fcSMacpaul Lin void dcache_disable(void); 35*00f892fcSMacpaul Lin 36*00f892fcSMacpaul Lin #define DEFINE_GET_SYS_REG(reg) \ 37*00f892fcSMacpaul Lin static inline unsigned long GET_##reg(void) \ 38*00f892fcSMacpaul Lin { \ 39*00f892fcSMacpaul Lin unsigned long val; \ 40*00f892fcSMacpaul Lin __asm__ volatile ( \ 41*00f892fcSMacpaul Lin "mfsr %0, $"#reg : "=&r" (val) : : "memory" \ 42*00f892fcSMacpaul Lin ); \ 43*00f892fcSMacpaul Lin return val; \ 44*00f892fcSMacpaul Lin } 45*00f892fcSMacpaul Lin 46*00f892fcSMacpaul Lin enum cache_t {ICACHE, DCACHE}; 47*00f892fcSMacpaul Lin DEFINE_GET_SYS_REG(ICM_CFG); 48*00f892fcSMacpaul Lin DEFINE_GET_SYS_REG(DCM_CFG); 49*00f892fcSMacpaul Lin #define ICM_CFG_OFF_ISZ 6 /* I-cache line size */ 50*00f892fcSMacpaul Lin #define ICM_CFG_MSK_ISZ (0x7UL << ICM_CFG_OFF_ISZ) 51*00f892fcSMacpaul Lin #define DCM_CFG_OFF_DSZ 6 /* D-cache line size */ 52*00f892fcSMacpaul Lin #define DCM_CFG_MSK_DSZ (0x7UL << DCM_CFG_OFF_DSZ) 53*00f892fcSMacpaul Lin 54*00f892fcSMacpaul Lin #endif /* _ASM_CACHE_H */ 55