1*1d3d0f1fSWills Wang /* 2*1d3d0f1fSWills Wang * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com> 3*1d3d0f1fSWills Wang * 4*1d3d0f1fSWills Wang * SPDX-License-Identifier: GPL-2.0+ 5*1d3d0f1fSWills Wang */ 6*1d3d0f1fSWills Wang 7*1d3d0f1fSWills Wang #ifndef __ASM_MACH_DDR_H 8*1d3d0f1fSWills Wang #define __ASM_MACH_DDR_H 9*1d3d0f1fSWills Wang 10*1d3d0f1fSWills Wang void ddr_init(void); 11*1d3d0f1fSWills Wang void ddr_tap_tuning(void); 12*1d3d0f1fSWills Wang 13*1d3d0f1fSWills Wang #endif /* __ASM_MACH_DDR_H */ 14