xref: /rk3399_rockchip-uboot/arch/mips/dts/brcm,bcm6328.dtsi (revision 78118211fb61df2f6427dc0ea7a65c97c20b3d11)
1/*
2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
3 *
4 * SPDX-License-Identifier:	GPL-2.0+
5 */
6
7#include <dt-bindings/clock/bcm6328-clock.h>
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/reset/bcm6328-reset.h>
10#include "skeleton.dtsi"
11
12/ {
13	compatible = "brcm,bcm6328";
14
15	cpus {
16		reg = <0x10000000 0x4>;
17		#address-cells = <1>;
18		#size-cells = <0>;
19		u-boot,dm-pre-reloc;
20
21		cpu@0 {
22			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
23			device_type = "cpu";
24			reg = <0>;
25			u-boot,dm-pre-reloc;
26		};
27
28		cpu@1 {
29			compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
30			device_type = "cpu";
31			reg = <1>;
32			u-boot,dm-pre-reloc;
33		};
34	};
35
36	clocks {
37		compatible = "simple-bus";
38		#address-cells = <1>;
39		#size-cells = <1>;
40		u-boot,dm-pre-reloc;
41
42		periph_osc: periph-osc {
43			compatible = "fixed-clock";
44			#clock-cells = <0>;
45			clock-frequency = <50000000>;
46			u-boot,dm-pre-reloc;
47		};
48
49		periph_clk: periph-clk {
50			compatible = "brcm,bcm6345-clk";
51			reg = <0x10000004 0x4>;
52			#clock-cells = <1>;
53		};
54	};
55
56	ubus {
57		compatible = "simple-bus";
58		#address-cells = <1>;
59		#size-cells = <1>;
60		u-boot,dm-pre-reloc;
61
62		periph_rst: reset-controller@10000010 {
63			compatible = "brcm,bcm6345-reset";
64			reg = <0x10000010 0x4>;
65			#reset-cells = <1>;
66		};
67
68		pll_cntl: syscon@10000068 {
69			compatible = "syscon";
70			reg = <0x10000068 0x4>;
71		};
72
73		syscon-reboot {
74			compatible = "syscon-reboot";
75			regmap = <&pll_cntl>;
76			offset = <0x0>;
77			mask = <0x1>;
78		};
79
80		gpio: gpio-controller@10000084 {
81			compatible = "brcm,bcm6345-gpio";
82			reg = <0x10000084 0x4>, <0x1000008c 0x4>;
83			gpio-controller;
84			#gpio-cells = <2>;
85
86			status = "disabled";
87		};
88
89		uart0: serial@10000100 {
90			compatible = "brcm,bcm6345-uart";
91			reg = <0x10000100 0x18>;
92			clocks = <&periph_osc>;
93
94			status = "disabled";
95		};
96
97		uart1: serial@10000120 {
98			compatible = "brcm,bcm6345-uart";
99			reg = <0x10000120 0x18>;
100			clocks = <&periph_osc>;
101
102			status = "disabled";
103		};
104
105		leds: led-controller@10000800 {
106			compatible = "brcm,bcm6328-leds";
107			reg = <0x10000800 0x24>;
108			#address-cells = <1>;
109			#size-cells = <0>;
110
111			status = "disabled";
112		};
113
114		memory-controller@10003000 {
115			compatible = "brcm,bcm6328-mc";
116			reg = <0x10003000 0x1000>;
117			u-boot,dm-pre-reloc;
118		};
119	};
120};
121