xref: /rk3399_rockchip-uboot/arch/mips/dts/ap121.dts (revision dc557e9a1fe00ca9d884bd88feef5bebf23fede4)
16a7b52bcSWills Wang/*
26a7b52bcSWills Wang * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
36a7b52bcSWills Wang *
46a7b52bcSWills Wang * SPDX-License-Identifier: GPL-2.0+
56a7b52bcSWills Wang */
66a7b52bcSWills Wang
76a7b52bcSWills Wang/dts-v1/;
86a7b52bcSWills Wang#include "ar933x.dtsi"
96a7b52bcSWills Wang
106a7b52bcSWills Wang/ {
116a7b52bcSWills Wang	model = "AP121 Reference Board";
126a7b52bcSWills Wang	compatible = "qca,ap121", "qca,ar933x";
136a7b52bcSWills Wang
146a7b52bcSWills Wang	aliases {
156a7b52bcSWills Wang		spi0 = &spi0;
166a7b52bcSWills Wang		serial0 = &uart0;
176a7b52bcSWills Wang	};
186a7b52bcSWills Wang
196a7b52bcSWills Wang	chosen {
206a7b52bcSWills Wang		stdout-path = "serial0:115200n8";
216a7b52bcSWills Wang	};
226a7b52bcSWills Wang};
236a7b52bcSWills Wang
246a7b52bcSWills Wang&xtal {
256a7b52bcSWills Wang	clock-frequency = <25000000>;
266a7b52bcSWills Wang};
276a7b52bcSWills Wang
286a7b52bcSWills Wang&uart0 {
296a7b52bcSWills Wang	status = "okay";
306a7b52bcSWills Wang};
316a7b52bcSWills Wang
326a7b52bcSWills Wang&spi0 {
336a7b52bcSWills Wang	spi-max-frequency = <25000000>;
346a7b52bcSWills Wang	status = "okay";
356a7b52bcSWills Wang	spi-flash@0 {
366a7b52bcSWills Wang		#address-cells = <1>;
376a7b52bcSWills Wang		#size-cells = <1>;
386a7b52bcSWills Wang		compatible = "spi-flash";
396a7b52bcSWills Wang		memory-map = <0x9f000000 0x00800000>;
406a7b52bcSWills Wang		spi-max-frequency = <25000000>;
416a7b52bcSWills Wang		reg = <0>;
426a7b52bcSWills Wang	};
436a7b52bcSWills Wang};
44*04583c68SWills Wang
45*04583c68SWills Wang&gmac0 {
46*04583c68SWills Wang	phy-mode = "rmii";
47*04583c68SWills Wang	status = "okay";
48*04583c68SWills Wang};
49