xref: /rk3399_rockchip-uboot/arch/microblaze/cpu/timer.c (revision 9aa65cab73e4873f3e94c6df3d0efd99f3bc9926)
1 /*
2  * (C) Copyright 2007 Michal Simek
3  *
4  * Michal  SIMEK <monstr@monstr.eu>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <fdtdec.h>
11 #include <asm/microblaze_timer.h>
12 #include <asm/microblaze_intc.h>
13 
14 DECLARE_GLOBAL_DATA_PTR;
15 
16 volatile int timestamp = 0;
17 microblaze_timer_t *tmr;
18 
19 ulong get_timer (ulong base)
20 {
21 	if (tmr)
22 		return timestamp - base;
23 	return timestamp++ - base;
24 }
25 
26 void __udelay(unsigned long usec)
27 {
28 	u32 i;
29 
30 	if (tmr) {
31 		i = get_timer(0);
32 		while ((get_timer(0) - i) < (usec / 1000))
33 			;
34 	} else {
35 #ifndef CONFIG_OF_CONTROL
36 		for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
37 			;
38 #endif
39 	}
40 }
41 
42 #ifndef CONFIG_SPL_BUILD
43 static void timer_isr(void *arg)
44 {
45 	timestamp++;
46 	tmr->control = tmr->control | TIMER_INTERRUPT;
47 }
48 
49 int timer_init (void)
50 {
51 	int irq = -1;
52 	u32 preload = 0;
53 	u32 ret = 0;
54 
55 #ifdef CONFIG_OF_CONTROL
56 	const void *blob = gd->fdt_blob;
57 	int node = 0;
58 	u32 cell[2];
59 
60 	debug("TIMER: Initialization\n");
61 
62 	node = fdt_node_offset_by_compatible(blob, node,
63 				"xlnx,xps-timer-1.00.a");
64 	if (node != -1) {
65 		fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
66 		if (base == FDT_ADDR_T_NONE)
67 			return -1;
68 
69 		debug("TIMER: Base addr %lx\n", base);
70 		tmr = (microblaze_timer_t *)base;
71 
72 		ret = fdtdec_get_int_array(blob, node, "interrupts",
73 					    cell, ARRAY_SIZE(cell));
74 		if (ret)
75 			return ret;
76 
77 		irq = cell[0];
78 		debug("TIMER: IRQ %x\n", irq);
79 
80 		preload = fdtdec_get_int(blob, node, "clock-frequency", 0);
81 		preload /= CONFIG_SYS_HZ;
82 	} else {
83 		return node;
84 	}
85 
86 #else
87 #if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
88 	preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
89 	irq = CONFIG_SYS_TIMER_0_IRQ;
90 	tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
91 #endif
92 #endif
93 	if (tmr && preload && irq >= 0) {
94 		tmr->loadreg = preload;
95 		tmr->control = TIMER_INTERRUPT | TIMER_RESET;
96 		tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\
97 					TIMER_RELOAD | TIMER_DOWN_COUNT;
98 		timestamp = 0;
99 		ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
100 		if (ret)
101 			tmr = NULL;
102 	}
103 	/* No problem if timer is not found/initialized */
104 	return 0;
105 }
106 #else
107 int timer_init(void)
108 {
109 	return 0;
110 }
111 #endif
112 
113 /*
114  * This function is derived from PowerPC code (read timebase as long long).
115  * On Microblaze it just returns the timer value.
116  */
117 unsigned long long get_ticks(void)
118 {
119 	return get_timer(0);
120 }
121 
122 /*
123  * This function is derived from PowerPC code (timebase clock frequency).
124  * On Microblaze it returns the number of timer ticks per second.
125  */
126 ulong get_tbclk(void)
127 {
128 	return CONFIG_SYS_HZ;
129 }
130