xref: /rk3399_rockchip-uboot/arch/microblaze/cpu/timer.c (revision 9d24274509cdd463992dc1fb1a2820d6a4b6d21d)
16260fb04SPeter Tyser /*
26260fb04SPeter Tyser  * (C) Copyright 2007 Michal Simek
36260fb04SPeter Tyser  *
46260fb04SPeter Tyser  * Michal  SIMEK <monstr@monstr.eu>
56260fb04SPeter Tyser  *
61a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
76260fb04SPeter Tyser  */
86260fb04SPeter Tyser 
96260fb04SPeter Tyser #include <common.h>
106260fb04SPeter Tyser #include <asm/microblaze_timer.h>
116260fb04SPeter Tyser #include <asm/microblaze_intc.h>
126260fb04SPeter Tyser 
136260fb04SPeter Tyser volatile int timestamp = 0;
14bcbb046bSMichal Simek microblaze_timer_t *tmr;
156260fb04SPeter Tyser 
166260fb04SPeter Tyser ulong get_timer (ulong base)
176260fb04SPeter Tyser {
18bcbb046bSMichal Simek 	if (tmr)
19bcbb046bSMichal Simek 		return timestamp - base;
20bcbb046bSMichal Simek 	return timestamp++ - base;
216260fb04SPeter Tyser }
226260fb04SPeter Tyser 
23779bf42cSMichal Simek void __udelay(unsigned long usec)
24779bf42cSMichal Simek {
25bcbb046bSMichal Simek 	u32 i;
26779bf42cSMichal Simek 
27bcbb046bSMichal Simek 	if (tmr) {
28779bf42cSMichal Simek 		i = get_timer(0);
29779bf42cSMichal Simek 		while ((get_timer(0) - i) < (usec / 1000))
30779bf42cSMichal Simek 			;
31bcbb046bSMichal Simek 	} else {
32bcbb046bSMichal Simek 		for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++)
33779bf42cSMichal Simek 			;
34779bf42cSMichal Simek 	}
35bcbb046bSMichal Simek }
36779bf42cSMichal Simek 
37*9d242745SMichal Simek #ifndef CONFIG_SPL_BUILD
38bcbb046bSMichal Simek static void timer_isr(void *arg)
396260fb04SPeter Tyser {
406260fb04SPeter Tyser 	timestamp++;
416260fb04SPeter Tyser 	tmr->control = tmr->control | TIMER_INTERRUPT;
426260fb04SPeter Tyser }
436260fb04SPeter Tyser 
445bbcb6cfSMichal Simek int timer_init (void)
456260fb04SPeter Tyser {
46bcbb046bSMichal Simek 	int irq = -1;
47bcbb046bSMichal Simek 	u32 preload = 0;
48bcbb046bSMichal Simek 	u32 ret = 0;
49bcbb046bSMichal Simek 
50bcbb046bSMichal Simek #if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
51bcbb046bSMichal Simek 	preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ;
52bcbb046bSMichal Simek 	irq = CONFIG_SYS_TIMER_0_IRQ;
53bcbb046bSMichal Simek 	tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR);
54bcbb046bSMichal Simek #endif
55bcbb046bSMichal Simek 
56bcbb046bSMichal Simek 	if (tmr && preload && irq >= 0) {
57bcbb046bSMichal Simek 		tmr->loadreg = preload;
586260fb04SPeter Tyser 		tmr->control = TIMER_INTERRUPT | TIMER_RESET;
59bcbb046bSMichal Simek 		tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\
60bcbb046bSMichal Simek 					TIMER_RELOAD | TIMER_DOWN_COUNT;
614769be21SGraeme Russ 		timestamp = 0;
62bcbb046bSMichal Simek 		ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
63bcbb046bSMichal Simek 		if (ret)
64bcbb046bSMichal Simek 			tmr = NULL;
65bcbb046bSMichal Simek 	}
66bcbb046bSMichal Simek 	/* No problem if timer is not found/initialized */
675bbcb6cfSMichal Simek 	return 0;
686260fb04SPeter Tyser }
69*9d242745SMichal Simek #else
70*9d242745SMichal Simek int timer_init(void)
71*9d242745SMichal Simek {
72*9d242745SMichal Simek 	return 0;
73*9d242745SMichal Simek }
74*9d242745SMichal Simek #endif
75b9f0b730SStephan Linz 
76b9f0b730SStephan Linz /*
77b9f0b730SStephan Linz  * This function is derived from PowerPC code (read timebase as long long).
78b9f0b730SStephan Linz  * On Microblaze it just returns the timer value.
79b9f0b730SStephan Linz  */
80b9f0b730SStephan Linz unsigned long long get_ticks(void)
81b9f0b730SStephan Linz {
82b9f0b730SStephan Linz 	return get_timer(0);
83b9f0b730SStephan Linz }
84b9f0b730SStephan Linz 
85b9f0b730SStephan Linz /*
86b9f0b730SStephan Linz  * This function is derived from PowerPC code (timebase clock frequency).
87b9f0b730SStephan Linz  * On Microblaze it returns the number of timer ticks per second.
88b9f0b730SStephan Linz  */
89b9f0b730SStephan Linz ulong get_tbclk(void)
90b9f0b730SStephan Linz {
91b9f0b730SStephan Linz 	return CONFIG_SYS_HZ;
92b9f0b730SStephan Linz }
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