xref: /rk3399_rockchip-uboot/arch/microblaze/cpu/irq.S (revision e9a882803eb59f482ca4aa6ffd6fa21e4c53d618)
1/*
2 * (C) Copyright 2007 Michal Simek
3 *
4 * Michal  SIMEK <monstr@monstr.eu>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <config.h>
26#include <asm/asm.h>
27	.text
28	.global _interrupt_handler
29_interrupt_handler:
30	addi	r1, r1, -4
31	swi	r2, r1, 0
32	addi	r1, r1, -4
33	swi	r3, r1, 0
34	addi	r1, r1, -4
35	swi	r4, r1, 0
36	addi	r1, r1, -4
37	swi	r5, r1, 0
38	addi	r1, r1, -4
39	swi	r6, r1, 0
40	addi	r1, r1, -4
41	swi	r7, r1, 0
42	addi	r1, r1, -4
43	swi	r8, r1, 0
44	addi	r1, r1, -4
45	swi	r9, r1, 0
46	addi	r1, r1, -4
47	swi	r10, r1, 0
48	addi	r1, r1, -4
49	swi	r11, r1, 0
50	addi	r1, r1, -4
51	swi	r12, r1, 0
52	addi	r1, r1, -4
53	swi	r13, r1, 0
54	addi	r1, r1, -4
55	swi	r14, r1, 0
56	addi	r1, r1, -4
57	swi	r15, r1, 0
58	addi	r1, r1, -4
59	swi	r16, r1, 0
60	addi	r1, r1, -4
61	swi	r17, r1, 0
62	addi	r1, r1, -4
63	swi	r18, r1, 0
64	addi	r1, r1, -4
65	swi	r19, r1, 0
66	addi	r1, r1, -4
67	swi	r20, r1, 0
68	addi	r1, r1, -4
69	swi	r21, r1, 0
70	addi	r1, r1, -4
71	swi	r22, r1, 0
72	addi	r1, r1, -4
73	swi	r23, r1, 0
74	addi	r1, r1, -4
75	swi	r24, r1, 0
76	addi	r1, r1, -4
77	swi	r25, r1, 0
78	addi	r1, r1, -4
79	swi	r26, r1, 0
80	addi	r1, r1, -4
81	swi	r27, r1, 0
82	addi	r1, r1, -4
83	swi	r28, r1, 0
84	addi	r1, r1, -4
85	swi	r29, r1, 0
86	addi	r1, r1, -4
87	swi	r30, r1, 0
88	addi	r1, r1, -4
89	swi	r31, r1, 0
90	brlid	r15, interrupt_handler
91	nop
92	nop
93	lwi	r31, r1, 0
94	addi	r1, r1, 4
95	lwi	r30, r1, 0
96	addi	r1, r1, 4
97	lwi	r29, r1, 0
98	addi	r1, r1, 4
99	lwi	r28, r1, 0
100	addi	r1, r1, 4
101	lwi	r27, r1, 0
102	addi	r1, r1, 4
103	lwi	r26, r1, 0
104	addi	r1, r1, 4
105	lwi	r25, r1, 0
106	addi	r1, r1, 4
107	lwi	r24, r1, 0
108	addi	r1, r1, 4
109	lwi	r23, r1, 0
110	addi	r1, r1, 4
111	lwi	r22, r1, 0
112	addi	r1, r1, 4
113	lwi	r21, r1, 0
114	addi	r1, r1, 4
115	lwi	r20, r1, 0
116	addi	r1, r1, 4
117	lwi	r19, r1, 0
118	addi	r1, r1, 4
119	lwi	r18, r1, 0
120	addi	r1, r1, 4
121	lwi	r17, r1, 0
122	addi	r1, r1, 4
123	lwi	r16, r1, 0
124	addi	r1, r1, 4
125	lwi	r15, r1, 0
126	addi	r1, r1, 4
127	lwi	r14, r1, 0
128	addi	r1, r1, 4
129	lwi	r13, r1, 0
130	addi	r1, r1, 4
131	lwi	r12, r1, 0
132	addi	r1, r1, 4
133	lwi	r11, r1, 0
134	addi	r1, r1, 4
135	lwi	r10, r1, 0
136	addi	r1, r1, 4
137	lwi	r9, r1, 0
138	addi	r1, r1, 4
139	lwi	r8, r1, 0
140	addi	r1, r1, 4
141	lwi	r7, r1, 0
142	addi	r1, r1, 4
143	lwi	r6, r1, 0
144	addi	r1, r1, 4
145	lwi	r5, r1, 0
146	addi	r1, r1, 4
147	lwi	r4, r1, 0
148	addi	r1, r1, 4
149	lwi	r3, r1, 0
150	addi	r1, r1, 4
151	lwi	r2, r1, 0
152	addi	r1, r1, 4
153
154	/* enable_interrupt */
155#ifdef XILINX_USE_MSR_INSTR
156	msrset	r0, 2
157#else
158	/* FIXME unstable in stressed mode - two irqs */
159	nop
160	addi	r1, r1, -4
161	swi	r12, r1, 0
162	mfs	r12, rmsr
163	ori	r12, r12, 2
164	mts	rmsr, r12
165	lwi	r12, r1, 0
166	addi	r1, r1, 4
167	nop
168#endif
169	bra	r14
170	nop
171	nop
172	.size _interrupt_handler,.-_interrupt_handler
173