1819833afSPeter Tyser /* 2819833afSPeter Tyser * Freescale I2C Controller 3819833afSPeter Tyser * 4819833afSPeter Tyser * Copyright 2006 Freescale Semiconductor, Inc. 5819833afSPeter Tyser * 6819833afSPeter Tyser * Based on earlier versions by Gleb Natapov <gnatapov@mrv.com>, 7819833afSPeter Tyser * Xianghua Xiao <x.xiao@motorola.com>, Eran Liberty (liberty@freescale.com), 8819833afSPeter Tyser * and Jeff Brown. 9819833afSPeter Tyser * Some bits are taken from linux driver writen by adrian@humboldt.co.uk. 10819833afSPeter Tyser * 115b8031ccSTom Rini * SPDX-License-Identifier: GPL-2.0 12819833afSPeter Tyser */ 13819833afSPeter Tyser 14819833afSPeter Tyser #ifndef _ASM_FSL_I2C_H_ 15819833afSPeter Tyser #define _ASM_FSL_I2C_H_ 16819833afSPeter Tyser 17819833afSPeter Tyser #include <asm/types.h> 18819833afSPeter Tyser 19*ec2c81c5Smario.six@gdsys.cc typedef struct fsl_i2c_base { 20819833afSPeter Tyser 21819833afSPeter Tyser u8 adr; /* I2C slave address */ 22819833afSPeter Tyser u8 res0[3]; 23819833afSPeter Tyser #define I2C_ADR 0xFE 24819833afSPeter Tyser #define I2C_ADR_SHIFT 1 25819833afSPeter Tyser #define I2C_ADR_RES ~(I2C_ADR) 26819833afSPeter Tyser 27819833afSPeter Tyser u8 fdr; /* I2C frequency divider register */ 28819833afSPeter Tyser u8 res1[3]; 29819833afSPeter Tyser #define IC2_FDR 0x3F 30819833afSPeter Tyser #define IC2_FDR_SHIFT 0 31819833afSPeter Tyser #define IC2_FDR_RES ~(IC2_FDR) 32819833afSPeter Tyser 33819833afSPeter Tyser u8 cr; /* I2C control redister */ 34819833afSPeter Tyser u8 res2[3]; 35819833afSPeter Tyser #define I2C_CR_MEN 0x80 36819833afSPeter Tyser #define I2C_CR_MIEN 0x40 37819833afSPeter Tyser #define I2C_CR_MSTA 0x20 38819833afSPeter Tyser #define I2C_CR_MTX 0x10 39819833afSPeter Tyser #define I2C_CR_TXAK 0x08 40819833afSPeter Tyser #define I2C_CR_RSTA 0x04 41819833afSPeter Tyser #define I2C_CR_BCST 0x01 42819833afSPeter Tyser 43819833afSPeter Tyser u8 sr; /* I2C status register */ 44819833afSPeter Tyser u8 res3[3]; 45819833afSPeter Tyser #define I2C_SR_MCF 0x80 46819833afSPeter Tyser #define I2C_SR_MAAS 0x40 47819833afSPeter Tyser #define I2C_SR_MBB 0x20 48819833afSPeter Tyser #define I2C_SR_MAL 0x10 49819833afSPeter Tyser #define I2C_SR_BCSTM 0x08 50819833afSPeter Tyser #define I2C_SR_SRW 0x04 51819833afSPeter Tyser #define I2C_SR_MIF 0x02 52819833afSPeter Tyser #define I2C_SR_RXAK 0x01 53819833afSPeter Tyser 54819833afSPeter Tyser u8 dr; /* I2C data register */ 55819833afSPeter Tyser u8 res4[3]; 56819833afSPeter Tyser #define I2C_DR 0xFF 57819833afSPeter Tyser #define I2C_DR_SHIFT 0 58819833afSPeter Tyser #define I2C_DR_RES ~(I2C_DR) 59819833afSPeter Tyser } fsl_i2c_t; 60819833afSPeter Tyser 61819833afSPeter Tyser #endif /* _ASM_I2C_H_ */ 62