1a4145534SPeter Tyser /*
2a4145534SPeter Tyser * (C) Copyright 2000-2004
3a4145534SPeter Tyser * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4a4145534SPeter Tyser *
532dbaafaSAlison Wang * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
6a4145534SPeter Tyser * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7a4145534SPeter Tyser *
8*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
9a4145534SPeter Tyser */
10a4145534SPeter Tyser
11a4145534SPeter Tyser #include <common.h>
12a4145534SPeter Tyser #include <watchdog.h>
13a4145534SPeter Tyser #include <asm/processor.h>
14a4145534SPeter Tyser #include <asm/immap.h>
1532dbaafaSAlison Wang #include <asm/io.h>
16a4145534SPeter Tyser
17a4145534SPeter Tyser #ifdef CONFIG_M5272
interrupt_init(void)18a4145534SPeter Tyser int interrupt_init(void)
19a4145534SPeter Tyser {
2032dbaafaSAlison Wang intctrl_t *intp = (intctrl_t *) (MMAP_INTC);
21a4145534SPeter Tyser
22a4145534SPeter Tyser /* disable all external interrupts */
2332dbaafaSAlison Wang out_be32(&intp->int_icr1, 0x88888888);
2432dbaafaSAlison Wang out_be32(&intp->int_icr2, 0x88888888);
2532dbaafaSAlison Wang out_be32(&intp->int_icr3, 0x88888888);
2632dbaafaSAlison Wang out_be32(&intp->int_icr4, 0x88888888);
2732dbaafaSAlison Wang out_be32(&intp->int_pitr, 0x00000000);
2832dbaafaSAlison Wang
29a4145534SPeter Tyser /* initialize vector register */
3032dbaafaSAlison Wang out_8(&intp->int_pivr, 0x40);
31a4145534SPeter Tyser
32a4145534SPeter Tyser enable_interrupts();
33a4145534SPeter Tyser
34a4145534SPeter Tyser return 0;
35a4145534SPeter Tyser }
36a4145534SPeter Tyser
37a4145534SPeter Tyser #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)38a4145534SPeter Tyser void dtimer_intr_setup(void)
39a4145534SPeter Tyser {
4032dbaafaSAlison Wang intctrl_t *intp = (intctrl_t *) (CONFIG_SYS_INTR_BASE);
41a4145534SPeter Tyser
4232dbaafaSAlison Wang clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
4332dbaafaSAlison Wang setbits_be32(&intp->int_icr1, CONFIG_SYS_TMRINTR_PRI);
44a4145534SPeter Tyser }
45a4145534SPeter Tyser #endif /* CONFIG_MCFTMR */
46a4145534SPeter Tyser #endif /* CONFIG_M5272 */
47a4145534SPeter Tyser
48a4145534SPeter Tyser #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
49a4145534SPeter Tyser defined(CONFIG_M5271) || defined(CONFIG_M5275)
interrupt_init(void)50a4145534SPeter Tyser int interrupt_init(void)
51a4145534SPeter Tyser {
5232dbaafaSAlison Wang int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
53a4145534SPeter Tyser
54a4145534SPeter Tyser /* Make sure all interrupts are disabled */
55a4145534SPeter Tyser #if defined(CONFIG_M5208)
5632dbaafaSAlison Wang out_be32(&intp->imrl0, 0xffffffff);
5732dbaafaSAlison Wang out_be32(&intp->imrh0, 0xffffffff);
58a4145534SPeter Tyser #else
5932dbaafaSAlison Wang setbits_be32(&intp->imrl0, 0x1);
60a4145534SPeter Tyser #endif
61a4145534SPeter Tyser
62a4145534SPeter Tyser enable_interrupts();
63a4145534SPeter Tyser return 0;
64a4145534SPeter Tyser }
65a4145534SPeter Tyser
66a4145534SPeter Tyser #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)67a4145534SPeter Tyser void dtimer_intr_setup(void)
68a4145534SPeter Tyser {
6932dbaafaSAlison Wang int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
70a4145534SPeter Tyser
7132dbaafaSAlison Wang out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
7232dbaafaSAlison Wang clrbits_be32(&intp->imrl0, 0x00000001);
7332dbaafaSAlison Wang clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK);
74a4145534SPeter Tyser }
75a4145534SPeter Tyser #endif /* CONFIG_MCFTMR */
76a4145534SPeter Tyser #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
77a4145534SPeter Tyser
78a4145534SPeter Tyser #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
interrupt_init(void)79a4145534SPeter Tyser int interrupt_init(void)
80a4145534SPeter Tyser {
81a4145534SPeter Tyser enable_interrupts();
82a4145534SPeter Tyser
83a4145534SPeter Tyser return 0;
84a4145534SPeter Tyser }
85a4145534SPeter Tyser
86a4145534SPeter Tyser #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)87a4145534SPeter Tyser void dtimer_intr_setup(void)
88a4145534SPeter Tyser {
89a4145534SPeter Tyser mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
90a4145534SPeter Tyser mbar_writeByte(MCFSIM_TIMER2ICR, CONFIG_SYS_TMRINTR_PRI);
91a4145534SPeter Tyser }
92a4145534SPeter Tyser #endif /* CONFIG_MCFTMR */
93a4145534SPeter Tyser #endif /* CONFIG_M5249 || CONFIG_M5253 */
94