1a4145534SPeter Tyser /* 2a4145534SPeter Tyser * 3a4145534SPeter Tyser * (C) Copyright 2000-2003 4a4145534SPeter Tyser * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5a4145534SPeter Tyser * 6c6d88630SAlison Wang * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. 7a4145534SPeter Tyser * TsiChung Liew (Tsi-Chung.Liew@freescale.com) 8a4145534SPeter Tyser * 9*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 10a4145534SPeter Tyser */ 11a4145534SPeter Tyser 12a4145534SPeter Tyser #include <common.h> 13a4145534SPeter Tyser #include <asm/processor.h> 14a4145534SPeter Tyser 15a4145534SPeter Tyser #include <asm/immap.h> 16c6d88630SAlison Wang #include <asm/io.h> 17a4145534SPeter Tyser 18a4145534SPeter Tyser DECLARE_GLOBAL_DATA_PTR; 19a4145534SPeter Tyser /* 20a4145534SPeter Tyser * get_clocks() fills in gd->cpu_clock and gd->bus_clk 21a4145534SPeter Tyser */ get_clocks(void)22a4145534SPeter Tyserint get_clocks(void) 23a4145534SPeter Tyser { 24c6d88630SAlison Wang pll_t *pll = (pll_t *)(MMAP_PLL); 25a4145534SPeter Tyser 26c6d88630SAlison Wang out_be32(&pll->syncr, PLL_SYNCR_MFD(1)); 27a4145534SPeter Tyser 28c6d88630SAlison Wang while (!(in_be32(&pll->synsr) & PLL_SYNSR_LOCK)) 29c6d88630SAlison Wang ; 30a4145534SPeter Tyser 31a4145534SPeter Tyser gd->bus_clk = CONFIG_SYS_CLK; 32a4145534SPeter Tyser gd->cpu_clk = (gd->bus_clk * 2); 33a4145534SPeter Tyser 3400f792e0SHeiko Schocher #ifdef CONFIG_SYS_I2C_FSL 35609e6ec3SSimon Glass gd->arch.i2c1_clk = gd->bus_clk; 36a4145534SPeter Tyser #endif 37a4145534SPeter Tyser 38a4145534SPeter Tyser return (0); 39a4145534SPeter Tyser } 40