xref: /rk3399_rockchip-uboot/arch/m68k/cpu/mcf5227x/interrupts.c (revision 326ea986ac150acdc7656d57fca647db80b50158)
1a4145534SPeter Tyser /*
2a4145534SPeter Tyser  *
3a4145534SPeter Tyser  * (C) Copyright 2000-2004
4a4145534SPeter Tyser  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5a4145534SPeter Tyser  *
6849fc424SAlison Wang  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
7a4145534SPeter Tyser  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8a4145534SPeter Tyser  *
9*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
10a4145534SPeter Tyser  */
11a4145534SPeter Tyser 
12a4145534SPeter Tyser /* CPU specific interrupt routine */
13a4145534SPeter Tyser #include <common.h>
14a4145534SPeter Tyser #include <asm/immap.h>
15849fc424SAlison Wang #include <asm/io.h>
16a4145534SPeter Tyser 
interrupt_init(void)17a4145534SPeter Tyser int interrupt_init(void)
18a4145534SPeter Tyser {
19849fc424SAlison Wang 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
20a4145534SPeter Tyser 
21a4145534SPeter Tyser 	/* Make sure all interrupts are disabled */
22849fc424SAlison Wang 	setbits_be32(&intp->imrh0, 0xffffffff);
23849fc424SAlison Wang 	setbits_be32(&intp->imrl0, 0xffffffff);
24a4145534SPeter Tyser 
25a4145534SPeter Tyser 	enable_interrupts();
26a4145534SPeter Tyser 	return 0;
27a4145534SPeter Tyser }
28a4145534SPeter Tyser 
29a4145534SPeter Tyser #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)30a4145534SPeter Tyser void dtimer_intr_setup(void)
31a4145534SPeter Tyser {
32849fc424SAlison Wang 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
33a4145534SPeter Tyser 
34849fc424SAlison Wang 	out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
35849fc424SAlison Wang 	clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
36a4145534SPeter Tyser }
37a4145534SPeter Tyser #endif
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