10107f240SMasahiro Yamada/* 20107f240SMasahiro Yamada * Copyright (c) 2004-2008 Texas Instruments 30107f240SMasahiro Yamada * 40107f240SMasahiro Yamada * (C) Copyright 2002 50107f240SMasahiro Yamada * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> 60107f240SMasahiro Yamada * 70107f240SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 80107f240SMasahiro Yamada */ 90107f240SMasahiro Yamada 100107f240SMasahiro YamadaOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") 110107f240SMasahiro YamadaOUTPUT_ARCH(arm) 120107f240SMasahiro YamadaENTRY(_start) 130107f240SMasahiro YamadaSECTIONS 140107f240SMasahiro Yamada{ 150107f240SMasahiro Yamada . = 0x00000000; 160107f240SMasahiro Yamada 170107f240SMasahiro Yamada . = ALIGN(4); 180107f240SMasahiro Yamada .text : 190107f240SMasahiro Yamada { 200107f240SMasahiro Yamada *(.__image_copy_start) 210107f240SMasahiro Yamada *(.vectors) 220107f240SMasahiro Yamada CPUDIR/start.o (.text*) 230107f240SMasahiro Yamada *(.text*) 240107f240SMasahiro Yamada } 250107f240SMasahiro Yamada 260107f240SMasahiro Yamada . = ALIGN(4); 270107f240SMasahiro Yamada .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } 280107f240SMasahiro Yamada 290107f240SMasahiro Yamada . = ALIGN(4); 300107f240SMasahiro Yamada .data : { 310107f240SMasahiro Yamada *(.data*) 320107f240SMasahiro Yamada } 330107f240SMasahiro Yamada 340107f240SMasahiro Yamada . = ALIGN(4); 350107f240SMasahiro Yamada 360107f240SMasahiro Yamada . = .; 370107f240SMasahiro Yamada 380107f240SMasahiro Yamada . = ALIGN(4); 390107f240SMasahiro Yamada .u_boot_list : { 400107f240SMasahiro Yamada KEEP(*(SORT(.u_boot_list*))); 410107f240SMasahiro Yamada } 420107f240SMasahiro Yamada 430107f240SMasahiro Yamada . = ALIGN(4); 440107f240SMasahiro Yamada 45*f5e46b49SAlexander Graf .__efi_runtime_start : { 46*f5e46b49SAlexander Graf *(.__efi_runtime_start) 47*f5e46b49SAlexander Graf } 48*f5e46b49SAlexander Graf 49*f5e46b49SAlexander Graf .efi_runtime : { 50*f5e46b49SAlexander Graf *(efi_runtime_text) 51*f5e46b49SAlexander Graf *(efi_runtime_data) 52*f5e46b49SAlexander Graf } 53*f5e46b49SAlexander Graf 54*f5e46b49SAlexander Graf .__efi_runtime_stop : { 55*f5e46b49SAlexander Graf *(.__efi_runtime_stop) 56*f5e46b49SAlexander Graf } 57*f5e46b49SAlexander Graf 58*f5e46b49SAlexander Graf .efi_runtime_rel_start : 59*f5e46b49SAlexander Graf { 60*f5e46b49SAlexander Graf *(.__efi_runtime_rel_start) 61*f5e46b49SAlexander Graf } 62*f5e46b49SAlexander Graf 63*f5e46b49SAlexander Graf .efi_runtime_rel : { 64*f5e46b49SAlexander Graf *(.relefi_runtime_text) 65*f5e46b49SAlexander Graf *(.relefi_runtime_data) 66*f5e46b49SAlexander Graf } 67*f5e46b49SAlexander Graf 68*f5e46b49SAlexander Graf .efi_runtime_rel_stop : 69*f5e46b49SAlexander Graf { 70*f5e46b49SAlexander Graf *(.__efi_runtime_rel_stop) 71*f5e46b49SAlexander Graf } 72*f5e46b49SAlexander Graf 73*f5e46b49SAlexander Graf . = ALIGN(4); 740107f240SMasahiro Yamada .image_copy_end : 750107f240SMasahiro Yamada { 760107f240SMasahiro Yamada *(.__image_copy_end) 770107f240SMasahiro Yamada } 780107f240SMasahiro Yamada 790107f240SMasahiro Yamada .rel_dyn_start : 800107f240SMasahiro Yamada { 810107f240SMasahiro Yamada *(.__rel_dyn_start) 820107f240SMasahiro Yamada } 830107f240SMasahiro Yamada 840107f240SMasahiro Yamada .rel.dyn : { 850107f240SMasahiro Yamada *(.rel*) 860107f240SMasahiro Yamada } 870107f240SMasahiro Yamada 880107f240SMasahiro Yamada .rel_dyn_end : 890107f240SMasahiro Yamada { 900107f240SMasahiro Yamada *(.__rel_dyn_end) 910107f240SMasahiro Yamada } 920107f240SMasahiro Yamada 930107f240SMasahiro Yamada .end : 940107f240SMasahiro Yamada { 950107f240SMasahiro Yamada *(.__end) 960107f240SMasahiro Yamada } 970107f240SMasahiro Yamada 980107f240SMasahiro Yamada _image_binary_end = .; 990107f240SMasahiro Yamada 1000107f240SMasahiro Yamada/* 1010107f240SMasahiro Yamada * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c 1020107f240SMasahiro Yamada * __bss_base and __bss_limit are for linker only (overlay ordering) 1030107f240SMasahiro Yamada */ 1040107f240SMasahiro Yamada 1050107f240SMasahiro Yamada .bss_start __rel_dyn_start (OVERLAY) : { 1060107f240SMasahiro Yamada KEEP(*(.__bss_start)); 1070107f240SMasahiro Yamada __bss_base = .; 1080107f240SMasahiro Yamada } 1090107f240SMasahiro Yamada 1100107f240SMasahiro Yamada .bss __bss_base (OVERLAY) : { 1110107f240SMasahiro Yamada *(.bss*) 1120107f240SMasahiro Yamada . = ALIGN(4); 1130107f240SMasahiro Yamada __bss_limit = .; 1140107f240SMasahiro Yamada } 1150107f240SMasahiro Yamada 1160107f240SMasahiro Yamada .bss_end __bss_limit (OVERLAY) : { 1170107f240SMasahiro Yamada KEEP(*(.__bss_end)); 1180107f240SMasahiro Yamada } 1190107f240SMasahiro Yamada 1200107f240SMasahiro Yamada /* 1210107f240SMasahiro Yamada * Zynq needs to discard these sections because the user 1220107f240SMasahiro Yamada * is expected to pass this image on to tools for boot.bin 1230107f240SMasahiro Yamada * generation that require them to be dropped. 1240107f240SMasahiro Yamada */ 1250107f240SMasahiro Yamada /DISCARD/ : { *(.dynsym) } 1260107f240SMasahiro Yamada /DISCARD/ : { *(.dynbss*) } 1270107f240SMasahiro Yamada /DISCARD/ : { *(.dynstr*) } 1280107f240SMasahiro Yamada /DISCARD/ : { *(.dynamic*) } 1290107f240SMasahiro Yamada /DISCARD/ : { *(.plt*) } 1300107f240SMasahiro Yamada /DISCARD/ : { *(.interp*) } 1310107f240SMasahiro Yamada /DISCARD/ : { *(.gnu*) } 1320107f240SMasahiro Yamada /DISCARD/ : { *(.ARM.exidx*) } 1330107f240SMasahiro Yamada /DISCARD/ : { *(.gnu.linkonce.armexidx.*) } 1340107f240SMasahiro Yamada} 135