xref: /rk3399_rockchip-uboot/arch/arm/mach-uniphier/sbc/sbc.c (revision bfd07670a48d9fbf22646c93e07dcd8cbc8d0864)
1*9e3bb84bSMasahiro Yamada /*
2*9e3bb84bSMasahiro Yamada  * Copyright (C) 2011-2015 Panasonic Corporation
3*9e3bb84bSMasahiro Yamada  * Copyright (C) 2015-2017 Socionext Inc.
4*9e3bb84bSMasahiro Yamada  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5*9e3bb84bSMasahiro Yamada  *
6*9e3bb84bSMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
7*9e3bb84bSMasahiro Yamada  */
8*9e3bb84bSMasahiro Yamada 
9*9e3bb84bSMasahiro Yamada #include <linux/io.h>
10*9e3bb84bSMasahiro Yamada 
11*9e3bb84bSMasahiro Yamada #include "../init.h"
12*9e3bb84bSMasahiro Yamada #include "sbc-regs.h"
13*9e3bb84bSMasahiro Yamada 
14*9e3bb84bSMasahiro Yamada #define SBCTRL0_ADMULTIPLX_PERI_VALUE	0x33120000
15*9e3bb84bSMasahiro Yamada #define SBCTRL1_ADMULTIPLX_PERI_VALUE	0x03005500
16*9e3bb84bSMasahiro Yamada #define SBCTRL2_ADMULTIPLX_PERI_VALUE	0x14000020
17*9e3bb84bSMasahiro Yamada 
18*9e3bb84bSMasahiro Yamada #define SBCTRL0_ADMULTIPLX_MEM_VALUE	0x33120000
19*9e3bb84bSMasahiro Yamada #define SBCTRL1_ADMULTIPLX_MEM_VALUE	0x03005500
20*9e3bb84bSMasahiro Yamada #define SBCTRL2_ADMULTIPLX_MEM_VALUE	0x14000010
21*9e3bb84bSMasahiro Yamada 
22*9e3bb84bSMasahiro Yamada /* slower but LED works */
23*9e3bb84bSMasahiro Yamada #define SBCTRL0_SAVEPIN_PERI_VALUE	0x55450000
24*9e3bb84bSMasahiro Yamada #define SBCTRL1_SAVEPIN_PERI_VALUE	0x07168d00
25*9e3bb84bSMasahiro Yamada #define SBCTRL2_SAVEPIN_PERI_VALUE	0x34000009
26*9e3bb84bSMasahiro Yamada #define SBCTRL4_SAVEPIN_PERI_VALUE	0x02110110
27*9e3bb84bSMasahiro Yamada 
28*9e3bb84bSMasahiro Yamada /* faster but LED does not work */
29*9e3bb84bSMasahiro Yamada #define SBCTRL0_SAVEPIN_MEM_VALUE	0x55450000
30*9e3bb84bSMasahiro Yamada #define SBCTRL1_SAVEPIN_MEM_VALUE	0x06057700
31*9e3bb84bSMasahiro Yamada /* NOR flash needs more wait counts than SRAM */
32*9e3bb84bSMasahiro Yamada #define SBCTRL2_SAVEPIN_MEM_VALUE	0x34000009
33*9e3bb84bSMasahiro Yamada #define SBCTRL4_SAVEPIN_MEM_VALUE	0x02110210
34*9e3bb84bSMasahiro Yamada 
__uniphier_sbc_init(int savepin)35*9e3bb84bSMasahiro Yamada static void __uniphier_sbc_init(int savepin)
36*9e3bb84bSMasahiro Yamada {
37*9e3bb84bSMasahiro Yamada 	/*
38*9e3bb84bSMasahiro Yamada 	 * Only CS1 is connected to support card.
39*9e3bb84bSMasahiro Yamada 	 * BKSZ[1:0] should be set to "01".
40*9e3bb84bSMasahiro Yamada 	 */
41*9e3bb84bSMasahiro Yamada 	if (savepin) {
42*9e3bb84bSMasahiro Yamada 		writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
43*9e3bb84bSMasahiro Yamada 		writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
44*9e3bb84bSMasahiro Yamada 		writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
45*9e3bb84bSMasahiro Yamada 		writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
46*9e3bb84bSMasahiro Yamada 	} else {
47*9e3bb84bSMasahiro Yamada 		writel(SBCTRL0_ADMULTIPLX_MEM_VALUE, SBCTRL10);
48*9e3bb84bSMasahiro Yamada 		writel(SBCTRL1_ADMULTIPLX_MEM_VALUE, SBCTRL11);
49*9e3bb84bSMasahiro Yamada 		writel(SBCTRL2_ADMULTIPLX_MEM_VALUE, SBCTRL12);
50*9e3bb84bSMasahiro Yamada 	}
51*9e3bb84bSMasahiro Yamada 
52*9e3bb84bSMasahiro Yamada 	if (boot_is_swapped()) {
53*9e3bb84bSMasahiro Yamada 		/*
54*9e3bb84bSMasahiro Yamada 		 * Boot Swap On: boot from external NOR/SRAM
55*9e3bb84bSMasahiro Yamada 		 * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
56*9e3bb84bSMasahiro Yamada 		 *
57*9e3bb84bSMasahiro Yamada 		 * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
58*9e3bb84bSMasahiro Yamada 		 * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
59*9e3bb84bSMasahiro Yamada 		 */
60*9e3bb84bSMasahiro Yamada 		writel(0x0000bc01, SBBASE0);
61*9e3bb84bSMasahiro Yamada 	} else {
62*9e3bb84bSMasahiro Yamada 		/*
63*9e3bb84bSMasahiro Yamada 		 * Boot Swap Off: boot from mask ROM
64*9e3bb84bSMasahiro Yamada 		 * 0x40000000-0x41ffffff: mask ROM
65*9e3bb84bSMasahiro Yamada 		 * 0x42000000-0x43efffff: memory bank (31MB)
66*9e3bb84bSMasahiro Yamada 		 * 0x43f00000-0x43ffffff: peripherals (1MB)
67*9e3bb84bSMasahiro Yamada 		 */
68*9e3bb84bSMasahiro Yamada 		writel(0x0000be01, SBBASE0); /* dummy */
69*9e3bb84bSMasahiro Yamada 		writel(0x0200be01, SBBASE1);
70*9e3bb84bSMasahiro Yamada 	}
71*9e3bb84bSMasahiro Yamada }
72*9e3bb84bSMasahiro Yamada 
uniphier_sbc_init_admulti(void)73*9e3bb84bSMasahiro Yamada void uniphier_sbc_init_admulti(void)
74*9e3bb84bSMasahiro Yamada {
75*9e3bb84bSMasahiro Yamada 	__uniphier_sbc_init(0);
76*9e3bb84bSMasahiro Yamada }
77*9e3bb84bSMasahiro Yamada 
uniphier_sbc_init_savepin(void)78*9e3bb84bSMasahiro Yamada void uniphier_sbc_init_savepin(void)
79*9e3bb84bSMasahiro Yamada {
80*9e3bb84bSMasahiro Yamada 	__uniphier_sbc_init(1);
81*9e3bb84bSMasahiro Yamada }
82