xref: /rk3399_rockchip-uboot/arch/arm/mach-uniphier/sbc/sbc-regs.h (revision 28cd88baa3f11cdb52be3b6d0610dcf32c60871a)
1107b3fb4SMasahiro Yamada /*
2107b3fb4SMasahiro Yamada  * UniPhier SBC (System Bus Controller) registers
3107b3fb4SMasahiro Yamada  *
4*e8a92932SMasahiro Yamada  * Copyright (C) 2011-2014 Panasonic Corporation
5*e8a92932SMasahiro Yamada  * Copyright (C) 2015-2016 Socionext Inc.
6107b3fb4SMasahiro Yamada  *
7107b3fb4SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
8107b3fb4SMasahiro Yamada  */
9107b3fb4SMasahiro Yamada 
10107b3fb4SMasahiro Yamada #ifndef ARCH_SBC_REGS_H
11107b3fb4SMasahiro Yamada #define ARCH_SBC_REGS_H
12107b3fb4SMasahiro Yamada 
13107b3fb4SMasahiro Yamada #define	SBBASE_BASE		0x58c00100
14107b3fb4SMasahiro Yamada #define	SBBASE(x)		(SBBASE_BASE + (x) * 0x10)
15107b3fb4SMasahiro Yamada 
16107b3fb4SMasahiro Yamada #define	SBBASE0			(SBBASE(0))
17107b3fb4SMasahiro Yamada #define	SBBASE1			(SBBASE(1))
18107b3fb4SMasahiro Yamada #define	SBBASE2			(SBBASE(2))
19107b3fb4SMasahiro Yamada #define	SBBASE3			(SBBASE(3))
20107b3fb4SMasahiro Yamada #define	SBBASE4			(SBBASE(4))
21107b3fb4SMasahiro Yamada #define	SBBASE5			(SBBASE(5))
22107b3fb4SMasahiro Yamada #define	SBBASE6			(SBBASE(6))
23107b3fb4SMasahiro Yamada #define	SBBASE7			(SBBASE(7))
24107b3fb4SMasahiro Yamada 
25107b3fb4SMasahiro Yamada #define	SBBASE_BANK_ENABLE	(0x00000001)
26107b3fb4SMasahiro Yamada 
27107b3fb4SMasahiro Yamada #define	SBCTRL_BASE		0x58c00200
28107b3fb4SMasahiro Yamada #define	SBCTRL(x, y)		(SBCTRL_BASE + (x) * 0x10 + (y) * 4)
29107b3fb4SMasahiro Yamada 
30107b3fb4SMasahiro Yamada #define	SBCTRL00		SBCTRL(0, 0)
31107b3fb4SMasahiro Yamada #define	SBCTRL01		SBCTRL(0, 1)
32107b3fb4SMasahiro Yamada #define	SBCTRL02		SBCTRL(0, 2)
33107b3fb4SMasahiro Yamada #define	SBCTRL03		SBCTRL(0, 3)
34107b3fb4SMasahiro Yamada #define	SBCTRL04		(SBCTRL_BASE + 0x100)
35107b3fb4SMasahiro Yamada 
36107b3fb4SMasahiro Yamada #define	SBCTRL10		SBCTRL(1, 0)
37107b3fb4SMasahiro Yamada #define	SBCTRL11		SBCTRL(1, 1)
38107b3fb4SMasahiro Yamada #define	SBCTRL12		SBCTRL(1, 2)
39107b3fb4SMasahiro Yamada #define	SBCTRL13		SBCTRL(1, 3)
40107b3fb4SMasahiro Yamada #define	SBCTRL14		(SBCTRL_BASE + 0x110)
41107b3fb4SMasahiro Yamada 
42107b3fb4SMasahiro Yamada #define	SBCTRL20		SBCTRL(2, 0)
43107b3fb4SMasahiro Yamada #define	SBCTRL21		SBCTRL(2, 1)
44107b3fb4SMasahiro Yamada #define	SBCTRL22		SBCTRL(2, 2)
45107b3fb4SMasahiro Yamada #define	SBCTRL23		SBCTRL(2, 3)
46107b3fb4SMasahiro Yamada #define	SBCTRL24		(SBCTRL_BASE + 0x120)
47107b3fb4SMasahiro Yamada 
48107b3fb4SMasahiro Yamada #define	SBCTRL30		SBCTRL(3, 0)
49107b3fb4SMasahiro Yamada #define	SBCTRL31		SBCTRL(3, 1)
50107b3fb4SMasahiro Yamada #define	SBCTRL32		SBCTRL(3, 2)
51107b3fb4SMasahiro Yamada #define	SBCTRL33		SBCTRL(3, 3)
52107b3fb4SMasahiro Yamada #define	SBCTRL34		(SBCTRL_BASE + 0x130)
53107b3fb4SMasahiro Yamada 
54107b3fb4SMasahiro Yamada #define	SBCTRL40		SBCTRL(4, 0)
55107b3fb4SMasahiro Yamada #define	SBCTRL41		SBCTRL(4, 1)
56107b3fb4SMasahiro Yamada #define	SBCTRL42		SBCTRL(4, 2)
57107b3fb4SMasahiro Yamada #define	SBCTRL43		SBCTRL(4, 3)
58107b3fb4SMasahiro Yamada #define	SBCTRL44		(SBCTRL_BASE + 0x140)
59107b3fb4SMasahiro Yamada 
60107b3fb4SMasahiro Yamada #define	SBCTRL50		SBCTRL(5, 0)
61107b3fb4SMasahiro Yamada #define	SBCTRL51		SBCTRL(5, 1)
62107b3fb4SMasahiro Yamada #define	SBCTRL52		SBCTRL(5, 2)
63107b3fb4SMasahiro Yamada #define	SBCTRL53		SBCTRL(5, 3)
64107b3fb4SMasahiro Yamada #define	SBCTRL54		(SBCTRL_BASE + 0x150)
65107b3fb4SMasahiro Yamada 
66107b3fb4SMasahiro Yamada #define	SBCTRL60		SBCTRL(6, 0)
67107b3fb4SMasahiro Yamada #define	SBCTRL61		SBCTRL(6, 1)
68107b3fb4SMasahiro Yamada #define	SBCTRL62		SBCTRL(6, 2)
69107b3fb4SMasahiro Yamada #define	SBCTRL63		SBCTRL(6, 3)
70107b3fb4SMasahiro Yamada #define	SBCTRL64		(SBCTRL_BASE + 0x160)
71107b3fb4SMasahiro Yamada 
72107b3fb4SMasahiro Yamada #define	SBCTRL70		SBCTRL(7, 0)
73107b3fb4SMasahiro Yamada #define	SBCTRL71		SBCTRL(7, 1)
74107b3fb4SMasahiro Yamada #define	SBCTRL72		SBCTRL(7, 2)
75107b3fb4SMasahiro Yamada #define	SBCTRL73		SBCTRL(7, 3)
76107b3fb4SMasahiro Yamada #define	SBCTRL74		(SBCTRL_BASE + 0x170)
77107b3fb4SMasahiro Yamada 
78107b3fb4SMasahiro Yamada #define PC0CTRL				0x598000c0
79107b3fb4SMasahiro Yamada 
80107b3fb4SMasahiro Yamada #ifndef __ASSEMBLY__
81107b3fb4SMasahiro Yamada #include <linux/io.h>
boot_is_swapped(void)82107b3fb4SMasahiro Yamada static inline int boot_is_swapped(void)
83107b3fb4SMasahiro Yamada {
84107b3fb4SMasahiro Yamada 	return !(readl(SBBASE0) & SBBASE_BANK_ENABLE);
85107b3fb4SMasahiro Yamada }
86107b3fb4SMasahiro Yamada #endif
87107b3fb4SMasahiro Yamada 
88107b3fb4SMasahiro Yamada #endif	/* ARCH_SBC_REGS_H */
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