1*9e3bb84bSMasahiro Yamada /* 2*9e3bb84bSMasahiro Yamada * Copyright (C) 2016-2017 Socionext Inc. 3*9e3bb84bSMasahiro Yamada * 4*9e3bb84bSMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 5*9e3bb84bSMasahiro Yamada */ 6*9e3bb84bSMasahiro Yamada 7*9e3bb84bSMasahiro Yamada #include <common.h> 8*9e3bb84bSMasahiro Yamada #include <spl.h> 9*9e3bb84bSMasahiro Yamada #include <linux/io.h> 10*9e3bb84bSMasahiro Yamada 11*9e3bb84bSMasahiro Yamada #include "../init.h" 12*9e3bb84bSMasahiro Yamada #include "sbc-regs.h" 13*9e3bb84bSMasahiro Yamada uniphier_ld11_sbc_init(void)14*9e3bb84bSMasahiro Yamadavoid uniphier_ld11_sbc_init(void) 15*9e3bb84bSMasahiro Yamada { 16*9e3bb84bSMasahiro Yamada uniphier_sbc_init_savepin(); 17*9e3bb84bSMasahiro Yamada 18*9e3bb84bSMasahiro Yamada /* necessary for ROM boot ?? */ 19*9e3bb84bSMasahiro Yamada /* system bus output enable */ 20*9e3bb84bSMasahiro Yamada writel(0x17, PC0CTRL); 21*9e3bb84bSMasahiro Yamada 22*9e3bb84bSMasahiro Yamada /* pins for NAND and System Bus are multiplexed */ 23*9e3bb84bSMasahiro Yamada if (spl_boot_device() != BOOT_DEVICE_NAND) 24*9e3bb84bSMasahiro Yamada uniphier_pin_init("system_bus_grp"); 25*9e3bb84bSMasahiro Yamada } 26