14c425570SMasahiro Yamada /* 2*928f3248SMasahiro Yamada * Copyright (C) 2012-2014 Panasonic Corporation 3*928f3248SMasahiro Yamada * Copyright (C) 2015-2016 Socionext Inc. 4*928f3248SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com> 54c425570SMasahiro Yamada * 64c425570SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 74c425570SMasahiro Yamada */ 84c425570SMasahiro Yamada 94c425570SMasahiro Yamada #include <common.h> 10f6e7f07cSMasahiro Yamada #include <linux/io.h> 11*928f3248SMasahiro Yamada #include <asm/secure.h> 12107b3fb4SMasahiro Yamada 13107b3fb4SMasahiro Yamada #include "sc-regs.h" 144c425570SMasahiro Yamada 15*928f3248SMasahiro Yamada /* If PSCI is enabled, this is used for SYSTEM_RESET function */ 16*928f3248SMasahiro Yamada #ifdef CONFIG_ARMV7_PSCI 17*928f3248SMasahiro Yamada #define __SECURE __secure 18*928f3248SMasahiro Yamada #else 19*928f3248SMasahiro Yamada #define __SECURE 20*928f3248SMasahiro Yamada #endif 21*928f3248SMasahiro Yamada reset_cpu(unsigned long ignored)22*928f3248SMasahiro Yamadavoid __SECURE reset_cpu(unsigned long ignored) 234c425570SMasahiro Yamada { 244c425570SMasahiro Yamada u32 tmp; 254c425570SMasahiro Yamada 264c425570SMasahiro Yamada writel(5, SC_IRQTIMSET); /* default value */ 274c425570SMasahiro Yamada 284c425570SMasahiro Yamada tmp = readl(SC_SLFRSTSEL); 294c425570SMasahiro Yamada tmp &= ~0x3; /* mask [1:0] */ 304c425570SMasahiro Yamada tmp |= 0x0; /* XRST reboot */ 314c425570SMasahiro Yamada writel(tmp, SC_SLFRSTSEL); 324c425570SMasahiro Yamada 334c425570SMasahiro Yamada tmp = readl(SC_SLFRSTCTL); 344c425570SMasahiro Yamada tmp |= 0x1; 354c425570SMasahiro Yamada writel(tmp, SC_SLFRSTCTL); 364c425570SMasahiro Yamada } 37