1*d5cf3297SMasahiro Yamada /* 2*d5cf3297SMasahiro Yamada * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> 3*d5cf3297SMasahiro Yamada * 4*d5cf3297SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 5*d5cf3297SMasahiro Yamada */ 6*d5cf3297SMasahiro Yamada 7*d5cf3297SMasahiro Yamada #include <common.h> 8*d5cf3297SMasahiro Yamada #include <debug_uart.h> 9*d5cf3297SMasahiro Yamada #include <linux/io.h> 10*d5cf3297SMasahiro Yamada #include <linux/serial_reg.h> 11*d5cf3297SMasahiro Yamada 12*d5cf3297SMasahiro Yamada #include "../soc-info.h" 13*d5cf3297SMasahiro Yamada #include "debug-uart.h" 14*d5cf3297SMasahiro Yamada 15*d5cf3297SMasahiro Yamada #define UNIPHIER_UART_TX 0x00 16*d5cf3297SMasahiro Yamada #define UNIPHIER_UART_LCR_MCR 0x10 17*d5cf3297SMasahiro Yamada #define UNIPHIER_UART_LSR 0x14 18*d5cf3297SMasahiro Yamada #define UNIPHIER_UART_LDR 0x24 19*d5cf3297SMasahiro Yamada 20*d5cf3297SMasahiro Yamada static void _debug_uart_putc(int c) 21*d5cf3297SMasahiro Yamada { 22*d5cf3297SMasahiro Yamada void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; 23*d5cf3297SMasahiro Yamada 24*d5cf3297SMasahiro Yamada while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE)) 25*d5cf3297SMasahiro Yamada ; 26*d5cf3297SMasahiro Yamada 27*d5cf3297SMasahiro Yamada writel(c, base + UNIPHIER_UART_TX); 28*d5cf3297SMasahiro Yamada } 29*d5cf3297SMasahiro Yamada 30*d5cf3297SMasahiro Yamada void _debug_uart_init(void) 31*d5cf3297SMasahiro Yamada { 32*d5cf3297SMasahiro Yamada void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; 33*d5cf3297SMasahiro Yamada unsigned int divisor; 34*d5cf3297SMasahiro Yamada 35*d5cf3297SMasahiro Yamada switch (uniphier_get_soc_type()) { 36*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_SLD3) 37*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_SLD3: 38*d5cf3297SMasahiro Yamada divisor = uniphier_sld3_debug_uart_init(); 39*d5cf3297SMasahiro Yamada break; 40*d5cf3297SMasahiro Yamada #endif 41*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_LD4) 42*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_LD4: 43*d5cf3297SMasahiro Yamada divisor = uniphier_ld4_debug_uart_init(); 44*d5cf3297SMasahiro Yamada break; 45*d5cf3297SMasahiro Yamada #endif 46*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_PRO4) 47*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_PRO4: 48*d5cf3297SMasahiro Yamada divisor = uniphier_pro4_debug_uart_init(); 49*d5cf3297SMasahiro Yamada break; 50*d5cf3297SMasahiro Yamada #endif 51*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_SLD8) 52*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_SLD8: 53*d5cf3297SMasahiro Yamada divisor = uniphier_sld8_debug_uart_init(); 54*d5cf3297SMasahiro Yamada break; 55*d5cf3297SMasahiro Yamada #endif 56*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_PRO5) 57*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_PRO5: 58*d5cf3297SMasahiro Yamada divisor = uniphier_pro5_debug_uart_init(); 59*d5cf3297SMasahiro Yamada break; 60*d5cf3297SMasahiro Yamada #endif 61*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_PXS2) 62*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_PXS2: 63*d5cf3297SMasahiro Yamada divisor = uniphier_pxs2_debug_uart_init(); 64*d5cf3297SMasahiro Yamada break; 65*d5cf3297SMasahiro Yamada #endif 66*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_LD6B) 67*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_LD6B: 68*d5cf3297SMasahiro Yamada divisor = uniphier_ld6b_debug_uart_init(); 69*d5cf3297SMasahiro Yamada break; 70*d5cf3297SMasahiro Yamada #endif 71*d5cf3297SMasahiro Yamada #if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) 72*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_LD11: 73*d5cf3297SMasahiro Yamada case SOC_UNIPHIER_LD20: 74*d5cf3297SMasahiro Yamada divisor = uniphier_ld20_debug_uart_init(); 75*d5cf3297SMasahiro Yamada break; 76*d5cf3297SMasahiro Yamada #endif 77*d5cf3297SMasahiro Yamada default: 78*d5cf3297SMasahiro Yamada return; 79*d5cf3297SMasahiro Yamada } 80*d5cf3297SMasahiro Yamada 81*d5cf3297SMasahiro Yamada writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR); 82*d5cf3297SMasahiro Yamada 83*d5cf3297SMasahiro Yamada writel(divisor, base + UNIPHIER_UART_LDR); 84*d5cf3297SMasahiro Yamada } 85*d5cf3297SMasahiro Yamada DEBUG_UART_FUNCS 86