xref: /rk3399_rockchip-uboot/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c (revision d5cf32977f0068c046687e3ff944c5e637b4bfa0)
1*d5cf3297SMasahiro Yamada /*
2*d5cf3297SMasahiro Yamada  * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
3*d5cf3297SMasahiro Yamada  *
4*d5cf3297SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
5*d5cf3297SMasahiro Yamada  */
6*d5cf3297SMasahiro Yamada 
7*d5cf3297SMasahiro Yamada #include <config.h>
8*d5cf3297SMasahiro Yamada #include <linux/kernel.h>
9*d5cf3297SMasahiro Yamada #include <linux/io.h>
10*d5cf3297SMasahiro Yamada 
11*d5cf3297SMasahiro Yamada #include "../sc-regs.h"
12*d5cf3297SMasahiro Yamada #include "../sg-regs.h"
13*d5cf3297SMasahiro Yamada #include "debug-uart.h"
14*d5cf3297SMasahiro Yamada 
15*d5cf3297SMasahiro Yamada #define UNIPHIER_PRO5_UART_CLK		73728000
16*d5cf3297SMasahiro Yamada 
uniphier_pro5_debug_uart_init(void)17*d5cf3297SMasahiro Yamada unsigned int uniphier_pro5_debug_uart_init(void)
18*d5cf3297SMasahiro Yamada {
19*d5cf3297SMasahiro Yamada 	u32 tmp;
20*d5cf3297SMasahiro Yamada 
21*d5cf3297SMasahiro Yamada 	sg_set_iectrl(0);
22*d5cf3297SMasahiro Yamada 	sg_set_pinsel(47, 0, 4, 8);	/* TXD0 -> TXD0 */
23*d5cf3297SMasahiro Yamada 	sg_set_pinsel(49, 0, 4, 8);	/* TXD1 -> TXD1 */
24*d5cf3297SMasahiro Yamada 	sg_set_pinsel(51, 0, 4, 8);	/* TXD2 -> TXD2 */
25*d5cf3297SMasahiro Yamada 	sg_set_pinsel(53, 0, 4, 8);	/* TXD3 -> TXD3 */
26*d5cf3297SMasahiro Yamada 
27*d5cf3297SMasahiro Yamada 	writel(1, SG_LOADPINCTRL);
28*d5cf3297SMasahiro Yamada 
29*d5cf3297SMasahiro Yamada 	tmp = readl(SC_CLKCTRL);
30*d5cf3297SMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_PERI;
31*d5cf3297SMasahiro Yamada 	writel(tmp, SC_CLKCTRL);
32*d5cf3297SMasahiro Yamada 
33*d5cf3297SMasahiro Yamada 	return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE);
34*d5cf3297SMasahiro Yamada }
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