xref: /rk3399_rockchip-uboot/arch/arm/mach-uniphier/clk/clk-pxs2.c (revision 29d63a59eaf1c9f3b37e249cda2a97e5e4f183f8)
1ea65c980SMasahiro Yamada /*
2ea65c980SMasahiro Yamada  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3ea65c980SMasahiro Yamada  *
4ea65c980SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
5ea65c980SMasahiro Yamada  */
6ea65c980SMasahiro Yamada 
7*29d63a59SMasahiro Yamada #include <linux/bitops.h>
8ea65c980SMasahiro Yamada #include <linux/io.h>
9ea65c980SMasahiro Yamada 
10ea65c980SMasahiro Yamada #include "../init.h"
11ea65c980SMasahiro Yamada #include "../sc-regs.h"
12ea65c980SMasahiro Yamada 
uniphier_pxs2_clk_init(void)135b660066SMasahiro Yamada void uniphier_pxs2_clk_init(void)
14ea65c980SMasahiro Yamada {
15ea65c980SMasahiro Yamada 	u32 tmp;
16ea65c980SMasahiro Yamada 
17ea65c980SMasahiro Yamada 	/* deassert reset */
18ea65c980SMasahiro Yamada 	tmp = readl(SC_RSTCTRL);
19ea65c980SMasahiro Yamada #ifdef CONFIG_USB_XHCI_UNIPHIER
20ea65c980SMasahiro Yamada 	tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
21ea65c980SMasahiro Yamada #endif
22ea65c980SMasahiro Yamada #ifdef CONFIG_UNIPHIER_ETH
23ea65c980SMasahiro Yamada 	tmp |= SC_RSTCTRL_NRST_ETHER;
24ea65c980SMasahiro Yamada #endif
25ea65c980SMasahiro Yamada #ifdef CONFIG_NAND_DENALI
26ea65c980SMasahiro Yamada 	tmp |= SC_RSTCTRL_NRST_NAND;
27ea65c980SMasahiro Yamada #endif
28ea65c980SMasahiro Yamada 	writel(tmp, SC_RSTCTRL);
29ea65c980SMasahiro Yamada 	readl(SC_RSTCTRL); /* dummy read */
30ea65c980SMasahiro Yamada 
31ea65c980SMasahiro Yamada #ifdef CONFIG_USB_XHCI_UNIPHIER
32ea65c980SMasahiro Yamada 	tmp = readl(SC_RSTCTRL2);
33ea65c980SMasahiro Yamada 	tmp |= SC_RSTCTRL2_NRST_USB3B1;
34ea65c980SMasahiro Yamada 	writel(tmp, SC_RSTCTRL2);
35ea65c980SMasahiro Yamada 	readl(SC_RSTCTRL2); /* dummy read */
36*29d63a59SMasahiro Yamada 
37*29d63a59SMasahiro Yamada 	tmp = readl(SC_RSTCTRL6);
38*29d63a59SMasahiro Yamada 	tmp |= 0x37;
39*29d63a59SMasahiro Yamada 	writel(tmp, SC_RSTCTRL6);
40ea65c980SMasahiro Yamada #endif
41ea65c980SMasahiro Yamada 
4267976306SMasahiro Yamada 	/* provide clocks */
43ea65c980SMasahiro Yamada 	tmp = readl(SC_CLKCTRL);
44ea65c980SMasahiro Yamada #ifdef CONFIG_USB_XHCI_UNIPHIER
45*29d63a59SMasahiro Yamada 	tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
46ea65c980SMasahiro Yamada 		SC_CLKCTRL_CEN_GIO;
47ea65c980SMasahiro Yamada #endif
48ea65c980SMasahiro Yamada #ifdef CONFIG_UNIPHIER_ETH
49ea65c980SMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_ETHER;
50ea65c980SMasahiro Yamada #endif
51ea65c980SMasahiro Yamada #ifdef CONFIG_NAND_DENALI
52ea65c980SMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_NAND;
53ea65c980SMasahiro Yamada #endif
54ea65c980SMasahiro Yamada 	writel(tmp, SC_CLKCTRL);
55ea65c980SMasahiro Yamada 	readl(SC_CLKCTRL); /* dummy read */
56ea65c980SMasahiro Yamada }
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