xref: /rk3399_rockchip-uboot/arch/arm/mach-uniphier/clk/clk-ld4.c (revision 8850c5d57c10aa6431d138d426e6e105c99cc7ba)
1ea65c980SMasahiro Yamada /*
270dda1b1SMasahiro Yamada  * Copyright (C) 2011-2015 Panasonic Corporation
370dda1b1SMasahiro Yamada  * Copyright (C) 2015-2016 Socionext Inc.
470dda1b1SMasahiro Yamada  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5ea65c980SMasahiro Yamada  *
6ea65c980SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
7ea65c980SMasahiro Yamada  */
8ea65c980SMasahiro Yamada 
9ea65c980SMasahiro Yamada #include <linux/io.h>
10ea65c980SMasahiro Yamada 
11ea65c980SMasahiro Yamada #include "../init.h"
12ea65c980SMasahiro Yamada #include "../sc-regs.h"
13ea65c980SMasahiro Yamada 
uniphier_ld4_clk_init(void)145b660066SMasahiro Yamada void uniphier_ld4_clk_init(void)
15ea65c980SMasahiro Yamada {
16ea65c980SMasahiro Yamada 	u32 tmp;
17ea65c980SMasahiro Yamada 
18ea65c980SMasahiro Yamada 	/* deassert reset */
19ea65c980SMasahiro Yamada 	tmp = readl(SC_RSTCTRL);
20ea65c980SMasahiro Yamada #ifdef CONFIG_UNIPHIER_ETH
21ea65c980SMasahiro Yamada 	tmp |= SC_RSTCTRL_NRST_ETHER;
22ea65c980SMasahiro Yamada #endif
23ea65c980SMasahiro Yamada #ifdef CONFIG_NAND_DENALI
24ea65c980SMasahiro Yamada 	tmp |= SC_RSTCTRL_NRST_NAND;
25ea65c980SMasahiro Yamada #endif
26ea65c980SMasahiro Yamada 	writel(tmp, SC_RSTCTRL);
27ea65c980SMasahiro Yamada 	readl(SC_RSTCTRL); /* dummy read */
28ea65c980SMasahiro Yamada 
2967976306SMasahiro Yamada 	/* provide clocks */
30ea65c980SMasahiro Yamada 	tmp = readl(SC_CLKCTRL);
31ea65c980SMasahiro Yamada #ifdef CONFIG_UNIPHIER_ETH
32ea65c980SMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_ETHER;
33ea65c980SMasahiro Yamada #endif
34*8850c5d5STom Rini #ifdef CONFIG_USB_EHCI_HCD
35ea65c980SMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
36ea65c980SMasahiro Yamada #endif
37ea65c980SMasahiro Yamada #ifdef CONFIG_NAND_DENALI
38ea65c980SMasahiro Yamada 	tmp |= SC_CLKCTRL_CEN_NAND;
39ea65c980SMasahiro Yamada #endif
40ea65c980SMasahiro Yamada 	writel(tmp, SC_CLKCTRL);
41ea65c980SMasahiro Yamada 	readl(SC_CLKCTRL); /* dummy read */
42ea65c980SMasahiro Yamada }
43