xref: /rk3399_rockchip-uboot/arch/arm/mach-uniphier/clk/clk-ld20.c (revision d38de7cb03adf88e18c05d840c2528b7a5af2f9b) 
1*c21f5854SMasahiro Yamada /*
2*c21f5854SMasahiro Yamada  * Copyright (C) 2017 Socionext Inc.
3*c21f5854SMasahiro Yamada  *
4*c21f5854SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
5*c21f5854SMasahiro Yamada  */
6*c21f5854SMasahiro Yamada 
7*c21f5854SMasahiro Yamada #include <linux/io.h>
8*c21f5854SMasahiro Yamada 
9*c21f5854SMasahiro Yamada #include "../init.h"
10*c21f5854SMasahiro Yamada 
11*c21f5854SMasahiro Yamada #define SDCTRL_EMMC_HW_RESET	0x59810280
12*c21f5854SMasahiro Yamada 
uniphier_ld20_clk_init(void)13*c21f5854SMasahiro Yamada void uniphier_ld20_clk_init(void)
14*c21f5854SMasahiro Yamada {
15*c21f5854SMasahiro Yamada 	/* TODO: use "mmc-pwrseq-emmc" */
16*c21f5854SMasahiro Yamada 	writel(1, SDCTRL_EMMC_HW_RESET);
17*c21f5854SMasahiro Yamada }
18