1*09f455dcSMasahiro Yamada /* 2*09f455dcSMasahiro Yamada * (C) Copyright 2012 3*09f455dcSMasahiro Yamada * NVIDIA Inc, <www.nvidia.com> 4*09f455dcSMasahiro Yamada * 5*09f455dcSMasahiro Yamada * Allen Martin <amartin@nvidia.com> 6*09f455dcSMasahiro Yamada * 7*09f455dcSMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 8*09f455dcSMasahiro Yamada */ 9*09f455dcSMasahiro Yamada #include <common.h> 10*09f455dcSMasahiro Yamada #include <spl.h> 11*09f455dcSMasahiro Yamada 12*09f455dcSMasahiro Yamada #include <asm/io.h> 13*09f455dcSMasahiro Yamada #include <asm/arch/clock.h> 14*09f455dcSMasahiro Yamada #include <asm/arch/pinmux.h> 15*09f455dcSMasahiro Yamada #include <asm/arch/tegra.h> 16*09f455dcSMasahiro Yamada #include <asm/arch-tegra/apb_misc.h> 17*09f455dcSMasahiro Yamada #include <asm/arch-tegra/board.h> 18*09f455dcSMasahiro Yamada #include <asm/spl.h> 19*09f455dcSMasahiro Yamada #include "cpu.h" 20*09f455dcSMasahiro Yamada 21*09f455dcSMasahiro Yamada void spl_board_init(void) 22*09f455dcSMasahiro Yamada { 23*09f455dcSMasahiro Yamada struct apb_misc_pp_ctlr *apb_misc = 24*09f455dcSMasahiro Yamada (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE; 25*09f455dcSMasahiro Yamada 26*09f455dcSMasahiro Yamada /* enable JTAG */ 27*09f455dcSMasahiro Yamada writel(0xC0, &apb_misc->cfg_ctl); 28*09f455dcSMasahiro Yamada 29*09f455dcSMasahiro Yamada board_init_uart_f(); 30*09f455dcSMasahiro Yamada 31*09f455dcSMasahiro Yamada /* Initialize periph GPIOs */ 32*09f455dcSMasahiro Yamada gpio_early_init_uart(); 33*09f455dcSMasahiro Yamada 34*09f455dcSMasahiro Yamada clock_early_init(); 35*09f455dcSMasahiro Yamada preloader_console_init(); 36*09f455dcSMasahiro Yamada } 37*09f455dcSMasahiro Yamada 38*09f455dcSMasahiro Yamada u32 spl_boot_device(void) 39*09f455dcSMasahiro Yamada { 40*09f455dcSMasahiro Yamada return BOOT_DEVICE_RAM; 41*09f455dcSMasahiro Yamada } 42*09f455dcSMasahiro Yamada 43*09f455dcSMasahiro Yamada void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 44*09f455dcSMasahiro Yamada { 45*09f455dcSMasahiro Yamada debug("image entry point: 0x%X\n", spl_image->entry_point); 46*09f455dcSMasahiro Yamada 47*09f455dcSMasahiro Yamada start_cpu((u32)spl_image->entry_point); 48*09f455dcSMasahiro Yamada halt_avp(); 49*09f455dcSMasahiro Yamada } 50