xref: /rk3399_rockchip-uboot/arch/arm/mach-tegra/lowlevel_init.S (revision 09f455dca74973ef5e42311162c8dff7e83d44a2)
1*09f455dcSMasahiro Yamada/*
2*09f455dcSMasahiro Yamada * SoC-specific setup info
3*09f455dcSMasahiro Yamada *
4*09f455dcSMasahiro Yamada * (C) Copyright 2010,2011
5*09f455dcSMasahiro Yamada * NVIDIA Corporation <www.nvidia.com>
6*09f455dcSMasahiro Yamada *
7*09f455dcSMasahiro Yamada * SPDX-License-Identifier:	GPL-2.0+
8*09f455dcSMasahiro Yamada */
9*09f455dcSMasahiro Yamada
10*09f455dcSMasahiro Yamada#include <config.h>
11*09f455dcSMasahiro Yamada#include <version.h>
12*09f455dcSMasahiro Yamada#include <linux/linkage.h>
13*09f455dcSMasahiro Yamada
14*09f455dcSMasahiro Yamada	.align	5
15*09f455dcSMasahiro YamadaENTRY(reset_cpu)
16*09f455dcSMasahiro Yamada	ldr	r1, rstctl			@ get addr for global reset
17*09f455dcSMasahiro Yamada						@ reg
18*09f455dcSMasahiro Yamada	ldr	r3, [r1]
19*09f455dcSMasahiro Yamada	orr	r3, r3, #0x10
20*09f455dcSMasahiro Yamada	str	r3, [r1]			@ force reset
21*09f455dcSMasahiro Yamada	mov	r0, r0
22*09f455dcSMasahiro Yamada_loop_forever:
23*09f455dcSMasahiro Yamada	b	_loop_forever
24*09f455dcSMasahiro Yamadarstctl:
25*09f455dcSMasahiro Yamada	.word	PRM_RSTCTRL
26*09f455dcSMasahiro YamadaENDPROC(reset_cpu)
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