1c7ba99c8SStephen Warren /* 2c7ba99c8SStephen Warren * Copyright (c) 2016, NVIDIA CORPORATION. 3c7ba99c8SStephen Warren * 4c7ba99c8SStephen Warren * SPDX-License-Identifier: GPL-2.0+ 5c7ba99c8SStephen Warren */ 6c7ba99c8SStephen Warren 7c7ba99c8SStephen Warren #include <common.h> 8c7ba99c8SStephen Warren #include <asm/arch/tegra.h> 9c7ba99c8SStephen Warren 10c7ba99c8SStephen Warren DECLARE_GLOBAL_DATA_PTR; 11c7ba99c8SStephen Warren board_early_init_f(void)12c7ba99c8SStephen Warrenint board_early_init_f(void) 13c7ba99c8SStephen Warren { 14c7ba99c8SStephen Warren return 0; 15c7ba99c8SStephen Warren } 16c7ba99c8SStephen Warren tegra_board_init(void)17cb0ff4ccSStephen Warren__weak int tegra_board_init(void) 18c7ba99c8SStephen Warren { 19c7ba99c8SStephen Warren return 0; 20c7ba99c8SStephen Warren } 21c7ba99c8SStephen Warren board_init(void)22cb0ff4ccSStephen Warrenint board_init(void) 23cb0ff4ccSStephen Warren { 24cb0ff4ccSStephen Warren return tegra_board_init(); 25cb0ff4ccSStephen Warren } 26cb0ff4ccSStephen Warren tegra_soc_board_init_late(void)27*86919a23SStephen Warren__weak int tegra_soc_board_init_late(void) 28c7ba99c8SStephen Warren { 29c7ba99c8SStephen Warren return 0; 30c7ba99c8SStephen Warren } 31*86919a23SStephen Warren board_late_init(void)32*86919a23SStephen Warrenint board_late_init(void) 33*86919a23SStephen Warren { 34*86919a23SStephen Warren return tegra_soc_board_init_late(); 35*86919a23SStephen Warren } 36