xref: /rk3399_rockchip-uboot/arch/arm/mach-tegra/Kconfig (revision 8dda2e2f9e0976249f4a390e72f12533dbcb5ef4)
109f455dcSMasahiro Yamadaif TEGRA
209f455dcSMasahiro Yamada
353b5bf3cSSimon Glassconfig SPL_GPIO_SUPPORT
453b5bf3cSSimon Glass	default y
553b5bf3cSSimon Glass
677d2f7f5SSimon Glassconfig SPL_LIBCOMMON_SUPPORT
777d2f7f5SSimon Glass	default y
877d2f7f5SSimon Glass
9cc4288efSSimon Glassconfig SPL_LIBGENERIC_SUPPORT
10cc4288efSSimon Glass	default y
11cc4288efSSimon Glass
12e00f76ceSSimon Glassconfig SPL_SERIAL_SUPPORT
13e00f76ceSSimon Glass	default y
14e00f76ceSSimon Glass
1549626ea8SStephen Warrenconfig TEGRA_IVC
1649626ea8SStephen Warren	bool "Tegra IVC protocol"
1749626ea8SStephen Warren	help
1849626ea8SStephen Warren	  IVC (Inter-VM Communication) protocol is a Tegra-specific IPC
1949626ea8SStephen Warren	  (Inter Processor Communication) framework. Within the context of
2049626ea8SStephen Warren	  U-Boot, it is typically used for communication between the main CPU
2149626ea8SStephen Warren	  and various auxiliary processors.
2249626ea8SStephen Warren
2315bcc62dSStephen Warrenconfig TEGRA_COMMON
2415bcc62dSStephen Warren	bool "Tegra common options"
25140a9eafSStephen Warren	select CLK
2656079eccSTom Warren	select DM
2796350f72SSimon Glass	select DM_ETH
2856079eccSTom Warren	select DM_GPIO
2915bcc62dSStephen Warren	select DM_I2C
30f77f5e9bSSimon Glass	select DM_KEYBOARD
316a474db4STom Warren	select DM_MMC
3291c08afeSSimon Glass	select DM_PWM
33140a9eafSStephen Warren	select DM_RESET
3415bcc62dSStephen Warren	select DM_SERIAL
3515bcc62dSStephen Warren	select DM_SPI
3615bcc62dSStephen Warren	select DM_SPI_FLASH
37140a9eafSStephen Warren	select MISC
3815bcc62dSStephen Warren	select OF_CONTROL
39d6ef8a61SSimon Glass	select VIDCONSOLE_AS_LCD if DM_VIDEO
40a5d67547SSimon Glass	select BOARD_EARLY_INIT_F
4115bcc62dSStephen Warren
42140a9eafSStephen Warrenconfig TEGRA_NO_BPMP
43140a9eafSStephen Warren	bool "Tegra common options for SoCs without BPMP"
44140a9eafSStephen Warren	select TEGRA_CAR
45140a9eafSStephen Warren	select TEGRA_CAR_CLOCK
46140a9eafSStephen Warren	select TEGRA_CAR_RESET
47140a9eafSStephen Warren
4815bcc62dSStephen Warrenconfig TEGRA_ARMV7_COMMON
4915bcc62dSStephen Warren	bool "Tegra 32-bit common options"
5015bcc62dSStephen Warren	select CPU_V7
5115bcc62dSStephen Warren	select SPL
5215bcc62dSStephen Warren	select SUPPORT_SPL
5315bcc62dSStephen Warren	select TEGRA_COMMON
54601800beSStephen Warren	select TEGRA_GPIO
55140a9eafSStephen Warren	select TEGRA_NO_BPMP
5615bcc62dSStephen Warren
5715bcc62dSStephen Warrenconfig TEGRA_ARMV8_COMMON
5815bcc62dSStephen Warren	bool "Tegra 64-bit common options"
5915bcc62dSStephen Warren	select ARM64
6015bcc62dSStephen Warren	select TEGRA_COMMON
6156079eccSTom Warren
6209f455dcSMasahiro Yamadachoice
6309f455dcSMasahiro Yamada	prompt "Tegra SoC select"
64a26cd049SJoe Hershberger	optional
6509f455dcSMasahiro Yamada
6609f455dcSMasahiro Yamadaconfig TEGRA20
6709f455dcSMasahiro Yamada	bool "Tegra20 family"
68*8dda2e2fSTom Rini	select ARM_ERRATA_716044
69*8dda2e2fSTom Rini	select ARM_ERRATA_742230
70*8dda2e2fSTom Rini	select ARM_ERRATA_751472
7156079eccSTom Warren	select TEGRA_ARMV7_COMMON
7209f455dcSMasahiro Yamada
7309f455dcSMasahiro Yamadaconfig TEGRA30
7409f455dcSMasahiro Yamada	bool "Tegra30 family"
75*8dda2e2fSTom Rini	select ARM_ERRATA_743622
76*8dda2e2fSTom Rini	select ARM_ERRATA_751472
7756079eccSTom Warren	select TEGRA_ARMV7_COMMON
7809f455dcSMasahiro Yamada
7909f455dcSMasahiro Yamadaconfig TEGRA114
8009f455dcSMasahiro Yamada	bool "Tegra114 family"
8156079eccSTom Warren	select TEGRA_ARMV7_COMMON
8209f455dcSMasahiro Yamada
8309f455dcSMasahiro Yamadaconfig TEGRA124
8409f455dcSMasahiro Yamada	bool "Tegra124 family"
8556079eccSTom Warren	select TEGRA_ARMV7_COMMON
8609f455dcSMasahiro Yamada
877aaa5a60STom Warrenconfig TEGRA210
887aaa5a60STom Warren	bool "Tegra210 family"
89601800beSStephen Warren	select TEGRA_GPIO
9015bcc62dSStephen Warren	select TEGRA_ARMV8_COMMON
91140a9eafSStephen Warren	select TEGRA_NO_BPMP
927aaa5a60STom Warren
93c7ba99c8SStephen Warrenconfig TEGRA186
94c7ba99c8SStephen Warren	bool "Tegra186 family"
950f67e239SStephen Warren	select DM_MAILBOX
9673dd5c4cSStephen Warren	select TEGRA186_BPMP
97d9fd7008SStephen Warren	select TEGRA186_CLOCK
98c7ba99c8SStephen Warren	select TEGRA186_GPIO
994dd99d14SStephen Warren	select TEGRA186_RESET
100c7ba99c8SStephen Warren	select TEGRA_ARMV8_COMMON
1010f67e239SStephen Warren	select TEGRA_HSP
10249626ea8SStephen Warren	select TEGRA_IVC
103c7ba99c8SStephen Warren
10409f455dcSMasahiro Yamadaendchoice
10509f455dcSMasahiro Yamada
106dd8204deSStephen Warrenconfig TEGRA_DISCONNECT_UDC_ON_BOOT
107dd8204deSStephen Warren	bool "Disconnect USB device mode controller on boot"
108dd8204deSStephen Warren	default y
109dd8204deSStephen Warren	help
110dd8204deSStephen Warren	  When loading U-Boot into RAM over USB protocols using tools such as
111dd8204deSStephen Warren	  tegrarcm or L4T's exec-uboot.sh/tegraflash.py, Tegra's USB device
112dd8204deSStephen Warren	  mode controller is initialized and enumerated by the host PC running
113dd8204deSStephen Warren	  the tool. Unfortunately, these tools do not shut down the USB
114dd8204deSStephen Warren	  controller before executing the downloaded code, and so the host PC
115dd8204deSStephen Warren	  does not "de-enumerate" the USB device. This option shuts down the
116dd8204deSStephen Warren	  USB controller when U-Boot boots to avoid leaving a stale USB device
117dd8204deSStephen Warren	  present.
118dd8204deSStephen Warren
11909f455dcSMasahiro Yamadaconfig SYS_MALLOC_F_LEN
12009f455dcSMasahiro Yamada	default 0x1800
12109f455dcSMasahiro Yamada
12209f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra20/Kconfig"
12309f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra30/Kconfig"
12409f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra114/Kconfig"
12509f455dcSMasahiro Yamadasource "arch/arm/mach-tegra/tegra124/Kconfig"
1267aaa5a60STom Warrensource "arch/arm/mach-tegra/tegra210/Kconfig"
127c7ba99c8SStephen Warrensource "arch/arm/mach-tegra/tegra186/Kconfig"
12809f455dcSMasahiro Yamada
12909f455dcSMasahiro Yamadaendif
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