xref: /rk3399_rockchip-uboot/arch/arm/mach-socfpga/wrap_iocsr_config.c (revision ca62d2e1fca4e89b1e15e6bdc634f6ef39a7360d)
1*ca62d2e1SMarek Vasut /*
2*ca62d2e1SMarek Vasut  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
3*ca62d2e1SMarek Vasut  *
4*ca62d2e1SMarek Vasut  * SPDX-License-Identifier:    GPL-2.0+
5*ca62d2e1SMarek Vasut  */
6*ca62d2e1SMarek Vasut 
7*ca62d2e1SMarek Vasut #include <common.h>
8*ca62d2e1SMarek Vasut #include <errno.h>
9*ca62d2e1SMarek Vasut #include <asm/arch/clock_manager.h>
10*ca62d2e1SMarek Vasut /*
11*ca62d2e1SMarek Vasut  * Yes, dear reader, we're including a C file here, this is no mistake :-)
12*ca62d2e1SMarek Vasut  */
13*ca62d2e1SMarek Vasut #include <qts/iocsr_config.c>
14*ca62d2e1SMarek Vasut 
15*ca62d2e1SMarek Vasut int iocsr_get_config_table(const unsigned int chain_id,
16*ca62d2e1SMarek Vasut 			   const unsigned long **table,
17*ca62d2e1SMarek Vasut 			   unsigned int *table_len)
18*ca62d2e1SMarek Vasut {
19*ca62d2e1SMarek Vasut 	switch (chain_id) {
20*ca62d2e1SMarek Vasut 	case 0:
21*ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain0_table;
22*ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH;
23*ca62d2e1SMarek Vasut 		break;
24*ca62d2e1SMarek Vasut 	case 1:
25*ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain1_table;
26*ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH;
27*ca62d2e1SMarek Vasut 		break;
28*ca62d2e1SMarek Vasut 	case 2:
29*ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain2_table;
30*ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH;
31*ca62d2e1SMarek Vasut 		break;
32*ca62d2e1SMarek Vasut 	case 3:
33*ca62d2e1SMarek Vasut 		*table = iocsr_scan_chain3_table;
34*ca62d2e1SMarek Vasut 		*table_len = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH;
35*ca62d2e1SMarek Vasut 		break;
36*ca62d2e1SMarek Vasut 	default:
37*ca62d2e1SMarek Vasut 		return -EINVAL;
38*ca62d2e1SMarek Vasut 	}
39*ca62d2e1SMarek Vasut 
40*ca62d2e1SMarek Vasut 	return 0;
41*ca62d2e1SMarek Vasut }
42